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iommu: Introduce explicit type for non-strict DMA domains
Promote the difference between strict and non-strict DMA domains from an internal detail to a distinct domain feature and type, to pave the road for exposing it through the sysfs default domain interface. Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/08cd2afaf6b63c58ad49acec3517c9b32c2bb946.1628682049.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -1319,7 +1319,7 @@ void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit)
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* The IOMMU core code allocates the default DMA domain, which the
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* underlying IOMMU driver needs to support via the dma-iommu layer.
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*/
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if (domain->type == IOMMU_DOMAIN_DMA) {
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if (iommu_is_dma_domain(domain)) {
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if (iommu_dma_init_domain(domain, dma_base, dma_limit, dev))
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goto out_err;
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dev->dma_ops = &iommu_dma_ops;
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@ -115,6 +115,7 @@ static const char *iommu_domain_type_str(unsigned int t)
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case IOMMU_DOMAIN_UNMANAGED:
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return "Unmanaged";
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case IOMMU_DOMAIN_DMA:
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case IOMMU_DOMAIN_DMA_FQ:
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return "Translated";
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default:
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return "Unknown";
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@ -552,6 +553,9 @@ static ssize_t iommu_group_show_type(struct iommu_group *group,
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case IOMMU_DOMAIN_DMA:
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type = "DMA\n";
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break;
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case IOMMU_DOMAIN_DMA_FQ:
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type = "DMA-FQ\n";
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break;
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}
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}
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mutex_unlock(&group->mutex);
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@ -765,7 +769,7 @@ static int iommu_create_device_direct_mappings(struct iommu_group *group,
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unsigned long pg_size;
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int ret = 0;
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if (!domain || domain->type != IOMMU_DOMAIN_DMA)
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if (!domain || !iommu_is_dma_domain(domain))
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return 0;
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BUG_ON(!domain->pgsize_bitmap);
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@ -1948,7 +1952,7 @@ static struct iommu_domain *__iommu_domain_alloc(struct bus_type *bus,
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domain->pgsize_bitmap = bus->iommu_ops->pgsize_bitmap;
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/* Temporarily avoid -EEXIST while drivers still get their own cookies */
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if (type == IOMMU_DOMAIN_DMA && !domain->iova_cookie && iommu_get_dma_cookie(domain)) {
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if (iommu_is_dma_domain(domain) && !domain->iova_cookie && iommu_get_dma_cookie(domain)) {
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iommu_domain_free(domain);
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domain = NULL;
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}
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@ -61,6 +61,7 @@ struct iommu_domain_geometry {
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#define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
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implementation */
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#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
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#define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */
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/*
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* This are the possible domain-types
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@ -73,12 +74,17 @@ struct iommu_domain_geometry {
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* IOMMU_DOMAIN_DMA - Internally used for DMA-API implementations.
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* This flag allows IOMMU drivers to implement
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* certain optimizations for these domains
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* IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB
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* invalidation.
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*/
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#define IOMMU_DOMAIN_BLOCKED (0U)
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#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
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#define IOMMU_DOMAIN_UNMANAGED (__IOMMU_DOMAIN_PAGING)
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#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
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__IOMMU_DOMAIN_DMA_API)
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#define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \
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__IOMMU_DOMAIN_DMA_API | \
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__IOMMU_DOMAIN_DMA_FQ)
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struct iommu_domain {
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unsigned type;
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@ -90,6 +96,11 @@ struct iommu_domain {
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struct iommu_dma_cookie *iova_cookie;
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};
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static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
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{
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return domain->type & __IOMMU_DOMAIN_DMA_API;
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}
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enum iommu_cap {
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IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
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transactions */
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