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net: dsa: mv88e6xxx: Add 6390 family PCS registers to ethtool -d
The mv88e6390 has upto 8 sets of PCS registers, depending on how ports 9 and 10 are configured. The can be spread over 8 ports. If a port has a PCS register set, return it along with the port registers. The register space is sparse, so hard code a list of registers which will be returned. It can later be extended, if needed, by append to the end of the list. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3861,6 +3861,8 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
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.serdes_irq_status = mv88e6390_serdes_irq_status,
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.serdes_get_strings = mv88e6390_serdes_get_strings,
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.serdes_get_stats = mv88e6390_serdes_get_stats,
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.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
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.serdes_get_regs = mv88e6390_serdes_get_regs,
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.phylink_validate = mv88e6390_phylink_validate,
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.gpio_ops = &mv88e6352_gpio_ops,
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.phylink_validate = mv88e6390_phylink_validate,
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@ -3915,6 +3917,8 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
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.serdes_irq_status = mv88e6390_serdes_irq_status,
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.serdes_get_strings = mv88e6390_serdes_get_strings,
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.serdes_get_stats = mv88e6390_serdes_get_stats,
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.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
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.serdes_get_regs = mv88e6390_serdes_get_regs,
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.phylink_validate = mv88e6390_phylink_validate,
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.gpio_ops = &mv88e6352_gpio_ops,
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.phylink_validate = mv88e6390x_phylink_validate,
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@ -3968,6 +3972,8 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
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.serdes_irq_status = mv88e6390_serdes_irq_status,
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.serdes_get_strings = mv88e6390_serdes_get_strings,
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.serdes_get_stats = mv88e6390_serdes_get_stats,
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.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
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.serdes_get_regs = mv88e6390_serdes_get_regs,
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.phylink_validate = mv88e6390_phylink_validate,
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.avb_ops = &mv88e6390_avb_ops,
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.ptp_ops = &mv88e6352_ptp_ops,
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@ -4119,6 +4125,8 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
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.serdes_irq_status = mv88e6390_serdes_irq_status,
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.serdes_get_strings = mv88e6390_serdes_get_strings,
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.serdes_get_stats = mv88e6390_serdes_get_stats,
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.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
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.serdes_get_regs = mv88e6390_serdes_get_regs,
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.phylink_validate = mv88e6390_phylink_validate,
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.gpio_ops = &mv88e6352_gpio_ops,
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.avb_ops = &mv88e6390_avb_ops,
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@ -4464,6 +4472,8 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
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.serdes_get_sset_count = mv88e6390_serdes_get_sset_count,
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.serdes_get_strings = mv88e6390_serdes_get_strings,
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.serdes_get_stats = mv88e6390_serdes_get_stats,
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.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
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.serdes_get_regs = mv88e6390_serdes_get_regs,
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.phylink_validate = mv88e6390_phylink_validate,
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};
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@ -4519,6 +4529,8 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
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.serdes_get_sset_count = mv88e6390_serdes_get_sset_count,
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.serdes_get_strings = mv88e6390_serdes_get_strings,
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.serdes_get_stats = mv88e6390_serdes_get_stats,
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.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,
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.serdes_get_regs = mv88e6390_serdes_get_regs,
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.gpio_ops = &mv88e6352_gpio_ops,
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.avb_ops = &mv88e6390_avb_ops,
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.ptp_ops = &mv88e6352_ptp_ops,
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@ -675,3 +675,57 @@ unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)
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{
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return irq_find_mapping(chip->g2_irq.domain, port);
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}
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static const u16 mv88e6390_serdes_regs[] = {
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/* SERDES common registers */
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0xf00a, 0xf00b, 0xf00c,
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0xf010, 0xf011, 0xf012, 0xf013,
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0xf016, 0xf017, 0xf018,
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0xf01b, 0xf01c, 0xf01d, 0xf01e, 0xf01f,
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0xf020, 0xf021, 0xf022, 0xf023, 0xf024, 0xf025, 0xf026, 0xf027,
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0xf028, 0xf029,
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0xf030, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036, 0xf037,
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0xf038, 0xf039,
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/* SGMII */
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0x2000, 0x2001, 0x2002, 0x2003, 0x2004, 0x2005, 0x2006, 0x2007,
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0x2008,
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0x200f,
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0xa000, 0xa001, 0xa002, 0xa003,
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/* 10Gbase-X */
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0x1000, 0x1001, 0x1002, 0x1003, 0x1004, 0x1005, 0x1006, 0x1007,
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0x1008,
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0x100e, 0x100f,
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0x1018, 0x1019,
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0x9000, 0x9001, 0x9002, 0x9003, 0x9004,
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0x9006,
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0x9010, 0x9011, 0x9012, 0x9013, 0x9014, 0x9015, 0x9016,
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/* 10Gbase-R */
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0x1020, 0x1021, 0x1022, 0x1023, 0x1024, 0x1025, 0x1026, 0x1027,
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0x1028, 0x1029, 0x102a, 0x102b,
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};
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int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)
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{
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if (mv88e6xxx_serdes_get_lane(chip, port) == 0)
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return 0;
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return ARRAY_SIZE(mv88e6390_serdes_regs) * sizeof(u16);
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}
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void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p)
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{
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u16 *p = _p;
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int lane;
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u16 reg;
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int i;
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lane = mv88e6xxx_serdes_get_lane(chip, port);
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if (lane == 0)
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return;
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for (i = 0 ; i < ARRAY_SIZE(mv88e6390_serdes_regs); i++) {
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mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
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mv88e6390_serdes_regs[i], ®);
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p[i] = reg;
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}
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}
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@ -111,6 +111,8 @@ int mv88e6390_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
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int mv88e6352_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port);
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void mv88e6352_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p);
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int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port);
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void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p);
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/* Return the (first) SERDES lane address a port is using, 0 otherwise. */
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static inline u8 mv88e6xxx_serdes_get_lane(struct mv88e6xxx_chip *chip,
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