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rtl8xxxu: Use descriptive bits for setting RX paths for 1T2R parts

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This reduce the use of magic values a little.

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Jes Sorensen 2016-04-14 14:58:56 -04:00 committed by Kalle Valo
parent 9068308ad1
commit bd8fe40cc4
2 changed files with 7 additions and 1 deletions
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4
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.c
View File

@ -3814,8 +3814,10 @@ static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
rtl8xxxu_write32(priv, REG_FPGA1_TX_INFO, val32);
val32 = rtl8xxxu_read32(priv, REG_CCK0_AFE_SETTING);
val32 &= ~CCK0_AFE_RX_MASK;
val32 &= 0x00ffffff;
val32 |= 0x45000000;
val32 |= 0x40000000;
val32 |= CCK0_AFE_RX_ANT_B;
rtl8xxxu_write32(priv, REG_CCK0_AFE_SETTING, val32);
val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE);

4
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
View File

@ -882,6 +882,10 @@
#define CCK0_SIDEBAND BIT(4)
#define REG_CCK0_AFE_SETTING 0x0a04
#define CCK0_AFE_RX_MASK 0x0f000000
#define CCK0_AFE_RX_ANT_AB BIT(24)
#define CCK0_AFE_RX_ANT_A 0
#define CCK0_AFE_RX_ANT_B (BIT(24) | BIT(26))
#define REG_CONFIG_ANT_A 0x0b68
#define REG_CONFIG_ANT_B 0x0b6c