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Much love for rk3288 in general (power coefficients for the scheduler)

Browse Source 
and veyron chromeos devices in particular (regulators, suspend, cleanups)
 and bulk conversion of the remaining gpios to the helper constants denoting
 the iomux.
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Merge tag 'v5.2-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt

Much love for rk3288 in general (power coefficients for the scheduler)
and veyron chromeos devices in particular (regulators, suspend, cleanups)
and bulk conversion of the remaining gpios to the helper constants denoting
the iomux.

* tag 'v5.2-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: vdd_gpu off in suspend for rk3288-veyron
  ARM: dts: rockchip: vcc33_ccd off in suspend for rk3288-veyron-chromebook
  ARM: dts: rockchip: Add DDR retention/poweroff to rk3288-veyron hogs
  ARM: dts: rockchip: Add dynamic-power-coefficient for rk3288
  ARM: dts: rockchip: bulk convert gpios to their constant counterparts
  ARM: dts: rockchip: Add BT_EN to the power sequence for veyron
  ARM: dts: rockchip: Remove unnecessary setting of UART0 SCLK rate on veyron

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-04-28 12:59:37 -07:00
commit bcb84a1097
40 changed files with 851 additions and 838 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/boot/dts/rk3036-kylin.dts
View File

@ -368,31 +368,31 @@
&pinctrl {
leds {
led_ctl: led-ctl {
rockchip,pins = <2 30 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <2 2 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdio {
bt_wake_h: bt-wake-h {
rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sleep {
global_pwroff: global-pwroff {
rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>;
};
};
};

136
arch/arm/boot/dts/rk3036.dtsi
View File

@ -551,71 +551,71 @@
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins = <0 1 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA1 2 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins = <0 1 2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA1 2 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
rockchip,pins = <0 27 1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PB7 1 &pcfg_pull_default>;
};
sdmmc_cd: sdmmc-cd {
rockchip,pins = <1 17 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PC1 1 &pcfg_pull_default>;
};
sdmmc_bus1: sdmmc-bus1 {
rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PC2 1 &pcfg_pull_default>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_default>,
<1 19 RK_FUNC_1 &pcfg_pull_default>,
<1 20 RK_FUNC_1 &pcfg_pull_default>,
<1 21 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PC2 1 &pcfg_pull_default>,
<1 RK_PC3 1 &pcfg_pull_default>,
<1 RK_PC4 1 &pcfg_pull_default>,
<1 RK_PC5 1 &pcfg_pull_default>;
};
};
sdio {
sdio_bus1: sdio-bus1 {
rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PB3 1 &pcfg_pull_default>;
};
sdio_bus4: sdio-bus4 {
rockchip,pins = <0 11 RK_FUNC_1 &pcfg_pull_default>,
<0 12 RK_FUNC_1 &pcfg_pull_default>,
<0 13 RK_FUNC_1 &pcfg_pull_default>,
<0 14 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PB3 1 &pcfg_pull_default>,
<0 RK_PB4 1 &pcfg_pull_default>,
<0 RK_PB5 1 &pcfg_pull_default>,
<0 RK_PB6 1 &pcfg_pull_default>;
};
sdio_cmd: sdio-cmd {
rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PB0 1 &pcfg_pull_default>;
};
sdio_clk: sdio-clk {
rockchip,pins = <0 9 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PB1 1 &pcfg_pull_none>;
};
};
@ -625,135 +625,135 @@
* We also have external pulls, so disable the internal ones.
*/
emmc_clk: emmc-clk {
rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PA1 2 &pcfg_pull_default>;
};
emmc_bus8: emmc-bus8 {
rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_default>,
<1 25 RK_FUNC_2 &pcfg_pull_default>,
<1 26 RK_FUNC_2 &pcfg_pull_default>,
<1 27 RK_FUNC_2 &pcfg_pull_default>,
<1 28 RK_FUNC_2 &pcfg_pull_default>,
<1 29 RK_FUNC_2 &pcfg_pull_default>,
<1 30 RK_FUNC_2 &pcfg_pull_default>,
<1 31 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <1 RK_PD0 2 &pcfg_pull_default>,
<1 RK_PD1 2 &pcfg_pull_default>,
<1 RK_PD2 2 &pcfg_pull_default>,
<1 RK_PD3 2 &pcfg_pull_default>,
<1 RK_PD4 2 &pcfg_pull_default>,
<1 RK_PD5 2 &pcfg_pull_default>,
<1 RK_PD6 2 &pcfg_pull_default>,
<1 RK_PD7 2 &pcfg_pull_default>;
};
};
emac {
emac_xfer: emac-xfer {
rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */
<2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */
<2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */
<2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */
<2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */
<2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */
<2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */
<2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */
rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */
<2 RK_PB5 1 &pcfg_pull_default>, /* tx_en */
<2 RK_PB6 1 &pcfg_pull_default>, /* mac_clk */
<2 RK_PB7 1 &pcfg_pull_default>, /* rx_err */
<2 RK_PC0 1 &pcfg_pull_default>, /* rxd1 */
<2 RK_PC1 1 &pcfg_pull_default>, /* rxd0 */
<2 RK_PC2 1 &pcfg_pull_default>, /* txd1 */
<2 RK_PC3 1 &pcfg_pull_default>; /* txd0 */
};
emac_mdio: emac-mdio {
rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */
<2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */
rockchip,pins = <2 RK_PB4 1 &pcfg_pull_default>, /* mac_md */
<2 RK_PD1 1 &pcfg_pull_default>; /* mac_mdclk */
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
<0 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
<0 RK_PA1 1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
<0 3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
<0 RK_PA3 1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
<2 21 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>,
<2 RK_PC5 1 &pcfg_pull_none>;
};
};
i2s {
i2s_bus: i2s-bus {
rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_default>,
<1 1 RK_FUNC_1 &pcfg_pull_default>,
<1 2 RK_FUNC_1 &pcfg_pull_default>,
<1 3 RK_FUNC_1 &pcfg_pull_default>,
<1 4 RK_FUNC_1 &pcfg_pull_default>,
<1 5 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_default>,
<1 RK_PA1 1 &pcfg_pull_default>,
<1 RK_PA2 1 &pcfg_pull_default>,
<1 RK_PA3 1 &pcfg_pull_default>,
<1 RK_PA4 1 &pcfg_pull_default>,
<1 RK_PA5 1 &pcfg_pull_default>;
};
};
hdmi {
hdmi_ctl: hdmi-ctl {
rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>,
<1 9 RK_FUNC_1 &pcfg_pull_none>,
<1 10 RK_FUNC_1 &pcfg_pull_none>,
<1 11 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>,
<1 RK_PB1 1 &pcfg_pull_none>,
<1 RK_PB2 1 &pcfg_pull_none>,
<1 RK_PB3 1 &pcfg_pull_none>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <0 16 RK_FUNC_1 &pcfg_pull_default>,
<0 17 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC0 1 &pcfg_pull_default>,
<0 RK_PC1 1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins = <0 18 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PC2 1 &pcfg_pull_default>;
};
uart0_rts: uart0-rts {
rockchip,pins = <0 19 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC3 1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <2 22 RK_FUNC_1 &pcfg_pull_default>,
<2 23 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PC6 1 &pcfg_pull_default>,
<2 RK_PC7 1 &pcfg_pull_none>;
};
/* no rts / cts for uart1 */
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_default>,
<1 19 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC2 2 &pcfg_pull_default>,
<1 RK_PC3 2 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
spi-pins {
spi_txd:spi-txd {
rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
rockchip,pins = <1 RK_PD5 3 &pcfg_pull_default>;
};
spi_rxd:spi-rxd {
rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>;
rockchip,pins = <1 RK_PD4 3 &pcfg_pull_default>;
};
spi_clk:spi-clk {
rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PA0 2 &pcfg_pull_default>;
};
spi_cs0:spi-cs0 {
rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>;
rockchip,pins = <1 RK_PD6 3 &pcfg_pull_default>;
};
spi_cs1:spi-cs1 {
rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>;
rockchip,pins = <1 RK_PD7 3 &pcfg_pull_default>;
};
};

2
arch/arm/boot/dts/rk3066a-marsboard.dts
View File

@ -168,7 +168,7 @@
&pinctrl {
lan8720a {
phy_int: phy-int {
rockchip,pins = <RK_GPIO1 26 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

8
arch/arm/boot/dts/rk3066a-mk808.dts
View File

@ -136,25 +136,25 @@
&pinctrl {
usb-host {
host_drv: host-drv {
rockchip,pins = <RK_GPIO0 6 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
usb-otg {
otg_drv: otg-drv {
rockchip,pins = <RK_GPIO0 5 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <RK_GPIO3 7 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
sdio {
wifi_pwr: wifi-pwr {
rockchip,pins = <RK_GPIO3 24 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

26
arch/arm/boot/dts/rk3066a-rayeager.dts
View File

@ -322,71 +322,71 @@
ak8963 {
comp_int: comp-int {
rockchip,pins = <4 17 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <4 RK_PC1 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
emac {
rmii_rst: rmii-rst {
rockchip,pins = <1 30 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_output_high>;
};
};
ir {
ir_int: ir-int {
rockchip,pins = <6 1 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <6 RK_PA1 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
keys {
pwr_key: pwr-key {
rockchip,pins = <6 2 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <6 RK_PA2 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
mma8452 {
gsensor_int: gsensor-int {
rockchip,pins = <4 16 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
mmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <3 7 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
usb_host {
host_drv: host-drv {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_default>;
};
hub_rst: hub-rst {
rockchip,pins = <1 31 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_output_high>;
};
sata_pwr: sata-pwr {
rockchip,pins = <4 22 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_default>;
};
sata_reset: sata-reset {
rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_high>;
};
};
usb_otg {
otg_drv: otg-drv {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_default>;
};
};
tps {
pmic_int: pmic-int {
rockchip,pins = <6 4 RK_FUNC_GPIO &pcfg_pull_default>;
rockchip,pins = <6 RK_PA4 RK_FUNC_GPIO &pcfg_pull_default>;
};
pwr_hold: pwr-hold {
rockchip,pins = <6 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <6 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};

180
arch/arm/boot/dts/rk3066a.dtsi
View File

@ -391,33 +391,33 @@
emac {
emac_xfer: emac-xfer {
rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
<RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
<RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
<RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
<RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
<RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */
<RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
<RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */
rockchip,pins = <1 RK_PC0 2 &pcfg_pull_none>, /* mac_clk */
<1 RK_PC1 2 &pcfg_pull_none>, /* tx_en */
<1 RK_PC2 2 &pcfg_pull_none>, /* txd1 */
<1 RK_PC3 2 &pcfg_pull_none>, /* txd0 */
<1 RK_PC4 2 &pcfg_pull_none>, /* rx_err */
<1 RK_PC5 2 &pcfg_pull_none>, /* crs_dvalid */
<1 RK_PC6 2 &pcfg_pull_none>, /* rxd1 */
<1 RK_PC7 2 &pcfg_pull_none>; /* rxd0 */
};
emac_mdio: emac-mdio {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */
<RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */
rockchip,pins = <1 RK_PD0 2 &pcfg_pull_none>, /* mac_md */
<1 RK_PD1 2 &pcfg_pull_none>; /* mac_mdclk */
};
};
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <3 RK_PD7 2 &pcfg_pull_default>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <4 RK_PB1 2 &pcfg_pull_default>;
};
emmc_rst: emmc-rst {
rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <4 RK_PB2 2 &pcfg_pull_default>;
};
/*
@ -441,243 +441,243 @@
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO2 29 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD4 1 &pcfg_pull_none>,
<2 RK_PD5 1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO2 31 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD6 1 &pcfg_pull_none>,
<2 RK_PD7 1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA0 1 &pcfg_pull_none>,
<3 RK_PA1 1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>,
<RK_GPIO3 3 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA2 2 &pcfg_pull_none>,
<3 RK_PA3 2 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>,
<3 RK_PA5 1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_out: pwm0-out {
rockchip,pins = <RK_GPIO0 3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_out: pwm1-out {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_out: pwm2-out {
rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_out: pwm3-out {
rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>;
};
};
spi0 {
spi0_clk: spi0-clk {
rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA5 2 &pcfg_pull_default>;
};
spi0_cs0: spi0-cs0 {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA4 2 &pcfg_pull_default>;
};
spi0_tx: spi0-tx {
rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA7 2 &pcfg_pull_default>;
};
spi0_rx: spi0-rx {
rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA6 2 &pcfg_pull_default>;
};
spi0_cs1: spi0-cs1 {
rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <4 RK_PB7 1 &pcfg_pull_default>;
};
};
spi1 {
spi1_clk: spi1-clk {
rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PC3 2 &pcfg_pull_default>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PC4 2 &pcfg_pull_default>;
};
spi1_rx: spi1-rx {
rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PC6 2 &pcfg_pull_default>;
};
spi1_tx: spi1-tx {
rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PC5 2 &pcfg_pull_default>;
};
spi1_cs1: spi1-cs1 {
rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>;
rockchip,pins = <2 RK_PC7 2 &pcfg_pull_default>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_default>,
<1 RK_PA1 1 &pcfg_pull_default>;
};
uart0_cts: uart0-cts {
rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA2 1 &pcfg_pull_default>;
};
uart0_rts: uart0-rts {
rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA3 1 &pcfg_pull_default>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_default>,
<1 RK_PA5 1 &pcfg_pull_default>;
};
uart1_cts: uart1-cts {
rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_default>;
};
uart1_rts: uart1-rts {
rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>,
<1 RK_PB1 1 &pcfg_pull_default>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PD3 1 &pcfg_pull_default>,
<3 RK_PD4 1 &pcfg_pull_default>;
};
uart3_cts: uart3-cts {
rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PD5 1 &pcfg_pull_default>;
};
uart3_rts: uart3-rts {
rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PD6 1 &pcfg_pull_default>;
};
};
sd0 {
sd0_clk: sd0-clk {
rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PB0 1 &pcfg_pull_default>;
};
sd0_cmd: sd0-cmd {
rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PB1 1 &pcfg_pull_default>;
};
sd0_cd: sd0-cd {
rockchip,pins = <RK_GPIO3 14 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PB6 1 &pcfg_pull_default>;
};
sd0_wp: sd0-wp {
rockchip,pins = <RK_GPIO3 15 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PB7 1 &pcfg_pull_default>;
};
sd0_bus1: sd0-bus-width1 {
rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PB2 1 &pcfg_pull_default>;
};
sd0_bus4: sd0-bus-width4 {
rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 11 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 12 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 13 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PB2 1 &pcfg_pull_default>,
<3 RK_PB3 1 &pcfg_pull_default>,
<3 RK_PB4 1 &pcfg_pull_default>,
<3 RK_PB5 1 &pcfg_pull_default>;
};
};
sd1 {
sd1_clk: sd1-clk {
rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PC5 1 &pcfg_pull_default>;
};
sd1_cmd: sd1-cmd {
rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PC0 1 &pcfg_pull_default>;
};
sd1_cd: sd1-cd {
rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PC6 1 &pcfg_pull_default>;
};
sd1_wp: sd1-wp {
rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PC7 1 &pcfg_pull_default>;
};
sd1_bus1: sd1-bus-width1 {
rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PC1 1 &pcfg_pull_default>;
};
sd1_bus4: sd1-bus-width4 {
rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <3 RK_PC1 1 &pcfg_pull_default>,
<3 RK_PC2 1 &pcfg_pull_default>,
<3 RK_PC3 1 &pcfg_pull_default>,
<3 RK_PC4 1 &pcfg_pull_default>;
};
};
i2s0 {
i2s0_bus: i2s0-bus {
rockchip,pins = <RK_GPIO0 7 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 8 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 9 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 10 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 11 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 12 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 13 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 14 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 15 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PA7 1 &pcfg_pull_default>,
<0 RK_PB0 1 &pcfg_pull_default>,
<0 RK_PB1 1 &pcfg_pull_default>,
<0 RK_PB2 1 &pcfg_pull_default>,
<0 RK_PB3 1 &pcfg_pull_default>,
<0 RK_PB4 1 &pcfg_pull_default>,
<0 RK_PB5 1 &pcfg_pull_default>,
<0 RK_PB6 1 &pcfg_pull_default>,
<0 RK_PB7 1 &pcfg_pull_default>;
};
};
i2s1 {
i2s1_bus: i2s1-bus {
rockchip,pins = <RK_GPIO0 16 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 17 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 18 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 19 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 20 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 21 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PC0 1 &pcfg_pull_default>,
<0 RK_PC1 1 &pcfg_pull_default>,
<0 RK_PC2 1 &pcfg_pull_default>,
<0 RK_PC3 1 &pcfg_pull_default>,
<0 RK_PC4 1 &pcfg_pull_default>,
<0 RK_PC5 1 &pcfg_pull_default>;
};
};
i2s2 {
i2s2_bus: i2s2-bus {
rockchip,pins = <RK_GPIO0 24 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 25 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 26 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 27 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_default>,
<RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_default>;
rockchip,pins = <0 RK_PD0 1 &pcfg_pull_default>,
<0 RK_PD1 1 &pcfg_pull_default>,
<0 RK_PD2 1 &pcfg_pull_default>,
<0 RK_PD3 1 &pcfg_pull_default>,
<0 RK_PD4 1 &pcfg_pull_default>,
<0 RK_PD5 1 &pcfg_pull_default>;
};
};
};

4
arch/arm/boot/dts/rk3188-px3-evb.dts
View File

@ -247,10 +247,10 @@
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

14
arch/arm/boot/dts/rk3188-radxarock.dts
View File

@ -307,40 +307,40 @@
act8846 {
act8846_dvs0_ctl: act8846-dvs0-ctl {
rockchip,pins = <RK_GPIO3 27 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>;
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lan8720a {
phy_int: phy-int {
rockchip,pins = <RK_GPIO3 26 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
ir-receiver {
ir_recv_pin: ir-recv-pin {
rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sd0 {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <RK_GPIO3 1 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

210
arch/arm/boot/dts/rk3188.dtsi
View File

@ -315,15 +315,15 @@
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD0 2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <0 RK_PD2 2 &pcfg_pull_up>;
};
emmc_rst: emmc-rst {
rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD3 2 &pcfg_pull_none>;
};
/*
@ -336,291 +336,291 @@
emac {
emac_xfer: emac-xfer {
rockchip,pins = <RK_GPIO3 16 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */
<RK_GPIO3 17 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */
<RK_GPIO3 18 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */
<RK_GPIO3 19 RK_FUNC_2 &pcfg_pull_none>, /* rxd0 */
<RK_GPIO3 20 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */
<RK_GPIO3 21 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */
<RK_GPIO3 22 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */
<RK_GPIO3 23 RK_FUNC_2 &pcfg_pull_none>; /* crs_dvalid */
rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none>, /* tx_en */
<3 RK_PC1 2 &pcfg_pull_none>, /* txd1 */
<3 RK_PC2 2 &pcfg_pull_none>, /* txd0 */
<3 RK_PC3 2 &pcfg_pull_none>, /* rxd0 */
<3 RK_PC4 2 &pcfg_pull_none>, /* rxd1 */
<3 RK_PC5 2 &pcfg_pull_none>, /* mac_clk */
<3 RK_PC6 2 &pcfg_pull_none>, /* rx_err */
<3 RK_PC7 2 &pcfg_pull_none>; /* crs_dvalid */
};
emac_mdio: emac-mdio {
rockchip,pins = <RK_GPIO3 24 RK_FUNC_2 &pcfg_pull_none>,
<RK_GPIO3 25 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD0 2 &pcfg_pull_none>,
<3 RK_PD1 2 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 25 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>,
<1 RK_PD1 1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <RK_GPIO1 26 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 27 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>,
<1 RK_PD3 1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins = <RK_GPIO1 28 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 29 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>,
<1 RK_PD5 1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins = <RK_GPIO3 14 RK_FUNC_2 &pcfg_pull_none>,
<RK_GPIO3 15 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <3 RK_PB6 2 &pcfg_pull_none>,
<3 RK_PB7 2 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
rockchip,pins = <RK_GPIO1 30 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 31 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD6 1 &pcfg_pull_none>,
<1 RK_PD7 1 &pcfg_pull_none>;
};
};
lcdc1 {
lcdc1_dclk: lcdc1-dclk {
rockchip,pins = <2 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>;
};
lcdc1_den: lcdc1-den {
rockchip,pins = <2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none>;
};
lcdc1_hsync: lcdc1-hsync {
rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD2 1 &pcfg_pull_none>;
};
lcdc1_vsync: lcdc1-vsync {
rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD3 1 &pcfg_pull_none>;
};
lcdc1_rgb24: ldcd1-rgb24 {
rockchip,pins = <2 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC6 RK_FUNC_1 &pcfg_pull_none>,
<2 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>,
<2 RK_PA1 1 &pcfg_pull_none>,
<2 RK_PA2 1 &pcfg_pull_none>,
<2 RK_PA3 1 &pcfg_pull_none>,
<2 RK_PA4 1 &pcfg_pull_none>,
<2 RK_PA5 1 &pcfg_pull_none>,
<2 RK_PA6 1 &pcfg_pull_none>,
<2 RK_PA7 1 &pcfg_pull_none>,
<2 RK_PB0 1 &pcfg_pull_none>,
<2 RK_PB1 1 &pcfg_pull_none>,
<2 RK_PB2 1 &pcfg_pull_none>,
<2 RK_PB3 1 &pcfg_pull_none>,
<2 RK_PB4 1 &pcfg_pull_none>,
<2 RK_PB5 1 &pcfg_pull_none>,
<2 RK_PB6 1 &pcfg_pull_none>,
<2 RK_PB7 1 &pcfg_pull_none>,
<2 RK_PC0 1 &pcfg_pull_none>,
<2 RK_PC1 1 &pcfg_pull_none>,
<2 RK_PC2 1 &pcfg_pull_none>,
<2 RK_PC3 1 &pcfg_pull_none>,
<2 RK_PC4 1 &pcfg_pull_none>,
<2 RK_PC5 1 &pcfg_pull_none>,
<2 RK_PC6 1 &pcfg_pull_none>,
<2 RK_PC7 1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_out: pwm0-out {
rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_out: pwm1-out {
rockchip,pins = <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD4 1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_out: pwm2-out {
rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD5 1 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_out: pwm3-out {
rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD6 1 &pcfg_pull_none>;
};
};
spi0 {
spi0_clk: spi0-clk {
rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PA6 2 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PA7 2 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PA5 2 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PA4 2 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
rockchip,pins = <RK_GPIO1 15 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <1 RK_PB7 1 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PD6 1 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PD7 1 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
rockchip,pins = <RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PD4 1 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
rockchip,pins = <RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PD5 1 &pcfg_pull_up>;
};
spi1_cs1: spi1-cs1 {
rockchip,pins = <RK_GPIO1 14 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PB6 2 &pcfg_pull_up>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up>,
<1 RK_PA1 1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA2 1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA3 1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up>,
<1 RK_PA5 1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA7 1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB0 1 &pcfg_pull_up>,
<1 RK_PB1 1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>,
<RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB2 1 &pcfg_pull_up>,
<1 RK_PB3 1 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
rockchip,pins = <RK_GPIO1 12 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
rockchip,pins = <RK_GPIO1 13 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB5 1 &pcfg_pull_none>;
};
};
sd0 {
sd0_clk: sd0-clk {
rockchip,pins = <RK_GPIO3 2 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA2 1 &pcfg_pull_none>;
};
sd0_cmd: sd0-cmd {
rockchip,pins = <RK_GPIO3 3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA3 1 &pcfg_pull_none>;
};
sd0_cd: sd0-cd {
rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PB0 1 &pcfg_pull_none>;
};
sd0_wp: sd0-wp {
rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PB1 1 &pcfg_pull_none>;
};
sd0_pwr: sd0-pwr {
rockchip,pins = <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA1 1 &pcfg_pull_none>;
};
sd0_bus1: sd0-bus-width1 {
rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>;
};
sd0_bus4: sd0-bus-width4 {
rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 6 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 7 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>,
<3 RK_PA5 1 &pcfg_pull_none>,
<3 RK_PA6 1 &pcfg_pull_none>,
<3 RK_PA7 1 &pcfg_pull_none>;
};
};
sd1 {
sd1_clk: sd1-clk {
rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC5 1 &pcfg_pull_none>;
};
sd1_cmd: sd1-cmd {
rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC0 1 &pcfg_pull_none>;
};
sd1_cd: sd1-cd {
rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>;
};
sd1_wp: sd1-wp {
rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC7 1 &pcfg_pull_none>;
};
sd1_bus1: sd1-bus-width1 {
rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC1 1 &pcfg_pull_none>;
};
sd1_bus4: sd1-bus-width4 {
rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC1 1 &pcfg_pull_none>,
<3 RK_PC2 1 &pcfg_pull_none>,
<3 RK_PC3 1 &pcfg_pull_none>,
<3 RK_PC4 1 &pcfg_pull_none>;
};
};
i2s0 {
i2s0_bus: i2s0-bus {
rockchip,pins = <RK_GPIO1 16 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 17 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 18 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 19 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 20 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO1 21 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none>,
<1 RK_PC1 1 &pcfg_pull_none>,
<1 RK_PC2 1 &pcfg_pull_none>,
<1 RK_PC3 1 &pcfg_pull_none>,
<1 RK_PC4 1 &pcfg_pull_none>,
<1 RK_PC5 1 &pcfg_pull_none>;
};
};
spdif {
spdif_tx: spdif-tx {
rockchip,pins = <RK_GPIO1 14 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB6 1 &pcfg_pull_none>;
};
};
};

170
arch/arm/boot/dts/rk322x.dtsi
View File

@ -865,228 +865,228 @@
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <2 RK_PA7 2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <1 22 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC6 2 &pcfg_pull_none>;
};
emmc_bus8: emmc-bus8 {
rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_none>,
<1 25 RK_FUNC_2 &pcfg_pull_none>,
<1 26 RK_FUNC_2 &pcfg_pull_none>,
<1 27 RK_FUNC_2 &pcfg_pull_none>,
<1 28 RK_FUNC_2 &pcfg_pull_none>,
<1 29 RK_FUNC_2 &pcfg_pull_none>,
<1 30 RK_FUNC_2 &pcfg_pull_none>,
<1 31 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD0 2 &pcfg_pull_none>,
<1 RK_PD1 2 &pcfg_pull_none>,
<1 RK_PD2 2 &pcfg_pull_none>,
<1 RK_PD3 2 &pcfg_pull_none>,
<1 RK_PD4 2 &pcfg_pull_none>,
<1 RK_PD5 2 &pcfg_pull_none>,
<1 RK_PD6 2 &pcfg_pull_none>,
<1 RK_PD7 2 &pcfg_pull_none>;
};
};
gmac {
rgmii_pins: rgmii-pins {
rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
<2 12 RK_FUNC_1 &pcfg_pull_none>,
<2 25 RK_FUNC_1 &pcfg_pull_none>,
<2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 22 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 23 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 9 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 17 RK_FUNC_1 &pcfg_pull_none>,
<2 16 RK_FUNC_1 &pcfg_pull_none>,
<2 21 RK_FUNC_2 &pcfg_pull_none>,
<2 20 RK_FUNC_2 &pcfg_pull_none>,
<2 11 RK_FUNC_1 &pcfg_pull_none>,
<2 8 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>,
<2 RK_PB4 1 &pcfg_pull_none>,
<2 RK_PD1 1 &pcfg_pull_none>,
<2 RK_PC3 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PC2 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PC6 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PC7 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PB1 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PB5 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PC1 1 &pcfg_pull_none>,
<2 RK_PC0 1 &pcfg_pull_none>,
<2 RK_PC5 2 &pcfg_pull_none>,
<2 RK_PC4 2 &pcfg_pull_none>,
<2 RK_PB3 1 &pcfg_pull_none>,
<2 RK_PB0 1 &pcfg_pull_none>;
};
rmii_pins: rmii-pins {
rockchip,pins = <2 14 RK_FUNC_1 &pcfg_pull_none>,
<2 12 RK_FUNC_1 &pcfg_pull_none>,
<2 25 RK_FUNC_1 &pcfg_pull_none>,
<2 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 13 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,
<2 17 RK_FUNC_1 &pcfg_pull_none>,
<2 16 RK_FUNC_1 &pcfg_pull_none>,
<2 8 RK_FUNC_1 &pcfg_pull_none>,
<2 15 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>,
<2 RK_PB4 1 &pcfg_pull_none>,
<2 RK_PD1 1 &pcfg_pull_none>,
<2 RK_PC3 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PC2 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PB5 1 &pcfg_pull_none_drv_12ma>,
<2 RK_PC1 1 &pcfg_pull_none>,
<2 RK_PC0 1 &pcfg_pull_none>,
<2 RK_PB0 1 &pcfg_pull_none>,
<2 RK_PB7 1 &pcfg_pull_none>;
};
phy_pins: phy-pins {
rockchip,pins = <2 14 RK_FUNC_2 &pcfg_pull_none>,
<2 8 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <2 RK_PB6 2 &pcfg_pull_none>,
<2 RK_PB0 2 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
<0 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
<0 RK_PA1 1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_none>,
<0 3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
<0 RK_PA3 1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins = <2 20 RK_FUNC_1 &pcfg_pull_none>,
<2 21 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>,
<2 RK_PC5 1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
<0 7 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
<0 RK_PA7 1 &pcfg_pull_none>;
};
};
spi-0 {
spi0_clk: spi0-clk {
rockchip,pins = <0 9 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <0 RK_PB1 2 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
rockchip,pins = <0 14 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <0 RK_PB6 2 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
rockchip,pins = <0 11 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <0 RK_PB3 2 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
rockchip,pins = <0 13 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <0 RK_PB5 2 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
rockchip,pins = <1 12 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <1 RK_PB4 1 &pcfg_pull_up>;
};
};
spi-1 {
spi1_clk: spi1-clk {
rockchip,pins = <0 23 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <0 RK_PC7 2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins = <2 2 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <2 RK_PA2 2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <2 RK_PA0 2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
rockchip,pins = <2 1 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <2 RK_PA1 2 &pcfg_pull_up>;
};
spi1_cs1: spi1-cs1 {
rockchip,pins = <2 3 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <2 RK_PA3 2 &pcfg_pull_up>;
};
};
i2s1 {
i2s1_bus: i2s1-bus {
rockchip,pins = <0 8 RK_FUNC_1 &pcfg_pull_none>,
<0 9 RK_FUNC_1 &pcfg_pull_none>,
<0 11 RK_FUNC_1 &pcfg_pull_none>,
<0 12 RK_FUNC_1 &pcfg_pull_none>,
<0 13 RK_FUNC_1 &pcfg_pull_none>,
<0 14 RK_FUNC_1 &pcfg_pull_none>,
<1 2 RK_FUNC_2 &pcfg_pull_none>,
<1 4 RK_FUNC_2 &pcfg_pull_none>,
<1 5 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>,
<0 RK_PB1 1 &pcfg_pull_none>,
<0 RK_PB3 1 &pcfg_pull_none>,
<0 RK_PB4 1 &pcfg_pull_none>,
<0 RK_PB5 1 &pcfg_pull_none>,
<0 RK_PB6 1 &pcfg_pull_none>,
<1 RK_PA2 2 &pcfg_pull_none>,
<1 RK_PA4 2 &pcfg_pull_none>,
<1 RK_PA5 2 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <3 21 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC5 1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins = <0 30 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins = <1 12 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB4 2 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
rockchip,pins = <1 11 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB3 2 &pcfg_pull_none>;
};
};
spdif {
spdif_tx: spdif-tx {
rockchip,pins = <3 31 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD7 2 &pcfg_pull_none>;
};
};
tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <0 24 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
rockchip,pins = <0 24 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD0 2 &pcfg_pull_none>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <2 26 RK_FUNC_1 &pcfg_pull_none>,
<2 27 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD2 1 &pcfg_pull_none>,
<2 RK_PD3 1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins = <2 29 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD5 1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins = <0 17 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC1 1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <1 9 RK_FUNC_1 &pcfg_pull_none>,
<1 10 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>,
<1 RK_PB2 1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
rockchip,pins = <1 8 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
rockchip,pins = <1 11 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>,
<1 19 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up>,
<1 RK_PC3 2 &pcfg_pull_none>;
};
uart21_xfer: uart21-xfer {
rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>,
<1 9 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB2 2 &pcfg_pull_up>,
<1 RK_PB1 2 &pcfg_pull_none>;
};
uart2_cts: uart2-cts {
rockchip,pins = <0 25 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
};
uart2_rts: uart2-rts {
rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;
};
};
};

4
arch/arm/boot/dts/rk3288-evb-act8846.dts
View File

@ -175,13 +175,13 @@
&pinctrl {
lcd {
lcd_en: lcd-en {
rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wifi {
wifi_pwr: wifi-pwr {
rockchip,pins = <7 9 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

26
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@ -314,25 +314,25 @@
backlight {
bl_en: bl-en {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lcd {
lcd_cs: lcd-cs {
rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
@ -342,34 +342,34 @@
* high-speed mode on EVB board so bump up to 8ma.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
eth_phy {
eth_phy_pwr: eth-phy-pwr {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

10
arch/arm/boot/dts/rk3288-fennec.dts
View File

@ -278,27 +278,27 @@
gmac {
phy_int: phy-int {
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usbphy {
host_drv: host-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

4
arch/arm/boot/dts/rk3288-firefly-beta.dts
View File

@ -18,13 +18,13 @@
&pinctrl {
act8846 {
pmic_vsel: pmic-vsel {
rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
};
};
ir {
ir_int: ir-int {
rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

10
arch/arm/boot/dts/rk3288-firefly-reload-core.dtsi
View File

@ -224,25 +224,25 @@
act8846 {
pwr_hold: pwr-hold {
rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
};
pmic_vsel: pmic-vsel {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
};
};
gmac {
phy_int: phy-int {
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};

36
arch/arm/boot/dts/rk3288-firefly-reload.dts
View File

@ -306,39 +306,39 @@
&pinctrl {
ir {
ir_int: ir-int {
rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
dvp {
dvp_pwr: dvp-pwr {
rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
cif_pwr: cif-pwr {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
pwr_key: pwr-key {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
power_led: power-led {
rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
work_led: work-led {
rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@ -348,44 +348,44 @@
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio {
wifi_enable: wifi-enable {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbhub_rst: usbhub-rst {
rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
};
};
usb_otg {
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

4
arch/arm/boot/dts/rk3288-firefly.dts
View File

@ -18,13 +18,13 @@
&pinctrl {
act8846 {
pmic_vsel: pmic-vsel {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>;
};
};
ir {
ir_int: ir-int {
rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

38
arch/arm/boot/dts/rk3288-firefly.dtsi
View File

@ -392,49 +392,49 @@
act8846 {
pwr_hold: pwr-hold {
rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>;
};
};
dvp {
dvp_pwr: dvp-pwr {
rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
phy_int: phy-int {
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
hym8563 {
rtc_int: rtc-int {
rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
pwr_key: pwr-key {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
power_led: power-led {
rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <8 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
work_led: work-led {
rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@ -444,38 +444,38 @@
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbhub_rst: usbhub-rst {
rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
};
};
usb_otg {
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

28
arch/arm/boot/dts/rk3288-miqi.dts
View File

@ -296,29 +296,29 @@
act8846 {
pmic_int: pmic-int {
rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_sleep: pmic-sleep {
rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_low>;
};
pmic_vsel: pmic-vsel {
rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
};
};
gmac {
phy_int: phy-int {
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_pmeb: phy-pmeb {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
@ -328,28 +328,28 @@
* high-speed mode on firefly board so bump up to 12ma.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

28
arch/arm/boot/dts/rk3288-phycore-rdk.dts
View File

@ -160,15 +160,15 @@
buttons {
user_button_pins: user-button-pins {
/* button 1 */
rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_pull_up>,
rockchip,pins = <8 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>,
/* button 2 */
<8 0 RK_FUNC_GPIO &pcfg_pull_up>;
<8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
rv4162 {
i2c_rtc_int: i2c-rtc-int {
rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
@ -178,44 +178,44 @@
* high-speed mode on pcm-947 board so bump up to 12 mA.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_12ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
touchscreen {
ts_irq_pin: ts-irq-pin {
rockchip,pins = <5 15 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <5 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_host {
host0_vbus_drv: host0-vbus-drv {
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
host1_vbus_drv: host1-vbus-drv {
rockchip,pins = <2 0 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_otg {
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

30
arch/arm/boot/dts/rk3288-phycore-som.dtsi
View File

@ -342,49 +342,49 @@
* We also have external pulls, so disable the internal ones.
*/
emmc_clk: emmc-clk {
rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_12ma>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_12ma>;
};
emmc_bus8: emmc-bus8 {
rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
<3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_12ma>,
<3 RK_PA1 2 &pcfg_pull_none_12ma>,
<3 RK_PA2 2 &pcfg_pull_none_12ma>,
<3 RK_PA3 2 &pcfg_pull_none_12ma>,
<3 RK_PA4 2 &pcfg_pull_none_12ma>,
<3 RK_PA5 2 &pcfg_pull_none_12ma>,
<3 RK_PA6 2 &pcfg_pull_none_12ma>,
<3 RK_PA7 2 &pcfg_pull_none_12ma>;
};
};
gmac {
phy_int: phy-int {
rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
phy_rst: phy-rst {
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
leds {
user_led: user-led {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
/* Pin for switching state between sleep and non-sleep state */
pmic_sleep: pmic-sleep {
rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

14
arch/arm/boot/dts/rk3288-r89.dts
View File

@ -265,39 +265,39 @@
act8846 {
pmic_vsel: pmic-vsel {
rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <7 RK_PA1 RK_FUNC_GPIO &pcfg_output_low>;
};
pwr_hold: pwr-hold {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
ir {
ir_int: ir-int {
rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

4
arch/arm/boot/dts/rk3288-rock2-som.dtsi
View File

@ -231,13 +231,13 @@
emmc {
emmc_reset: emmc-reset {
rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
phy_rst: phy-rst {
rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
};
};
};

18
arch/arm/boot/dts/rk3288-rock2-square.dts
View File

@ -204,53 +204,53 @@
&pinctrl {
ir {
ir_int: ir-int {
rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <8 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
pwr_key: pwr-key {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
phone_ctl: phone-ctl {
rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <8 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sata {
sata_pwr_en: sata-pwr-en {
rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio {
wifi_enable: wifi-enable {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

30
arch/arm/boot/dts/rk3288-tinker.dtsi
View File

@ -363,68 +363,68 @@
backlight {
bl_en: bl-en {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
eth_phy {
eth_phy_pwr: eth-phy-pwr {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO \
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO \
&pcfg_pull_up>;
};
dvs_1: dvs-1 {
rockchip,pins = <RK_GPIO0 11 RK_FUNC_GPIO \
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO \
&pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO \
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO \
&pcfg_pull_down>;
};
};
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 \
rockchip,pins = <6 RK_PC4 1 \
&pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
pwr_3g: pwr-3g {
rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

8
arch/arm/boot/dts/rk3288-veyron-analog-audio.dtsi
View File

@ -73,7 +73,7 @@
&pinctrl {
codec {
hp_det: hp-det {
rockchip,pins = <6 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
/*
@ -82,17 +82,17 @@
* we've got a ts3a227e chip but the driver requires it.
*/
int_codec: int-codec {
rockchip,pins = <6 7 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
mic_det: mic-det {
rockchip,pins = <6 11 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headset {
ts3a227e_int_l: ts3a227e-int-l {
rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

8
arch/arm/boot/dts/rk3288-veyron-brain.dts
View File

@ -42,23 +42,23 @@
&pinctrl {
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb-host {
usb2_pwr_en: usb2-pwr-en {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

25
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
View File

@ -176,8 +176,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
regulator-off-in-suspend;
};
};
};
@ -229,6 +228,8 @@
&pinctrl {
pinctrl-0 = <
/* Common for sleep and wake, but no owners */
&ddr0_retention
&ddrio_pwroff
&global_pwroff
/* Wake only */
@ -236,6 +237,8 @@
>;
pinctrl-1 = <
/* Common for sleep and wake, but no owners */
&ddr0_retention
&ddrio_pwroff
&global_pwroff
/* Sleep only */
@ -244,51 +247,51 @@
backlight {
bl_en: bl-en {
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
ap_lid_int_l: ap-lid-int-l {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
charger {
ac_present_ap: ac-present-ap {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
cros-ec {
ec_int: ec-int {
rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
suspend {
suspend_l_wake: suspend-l-wake {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
};
suspend_l_sleep: suspend-l-sleep {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_high>;
};
};
trackpad {
trackpad_int: trackpad-int {
rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb-host {
host1_pwr_en: host1-pwr-en {
rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbotg_pwren_h: usbotg-pwren-h {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

14
arch/arm/boot/dts/rk3288-veyron-jaq.dts
View File

@ -138,39 +138,39 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

14
arch/arm/boot/dts/rk3288-veyron-jerry.dts
View File

@ -106,39 +106,39 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

6
arch/arm/boot/dts/rk3288-veyron-mickey.dts
View File

@ -186,17 +186,17 @@
&pinctrl {
hdmi {
power_hdmi_on: power-hdmi-on {
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

2
arch/arm/boot/dts/rk3288-veyron-mighty.dts
View File

@ -28,7 +28,7 @@
&pinctrl {
sdmmc {
sdmmc_wp_gpio: sdmmc-wp-gpio {
rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

24
arch/arm/boot/dts/rk3288-veyron-minnie.dts
View File

@ -191,65 +191,65 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buttons {
volum_down_l: volum-down-l {
rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
};
volum_up_l: volum-up-l {
rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
prochot {
gpio_prochot: gpio-prochot {
rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
touchscreen {
touch_int: touch-int {
rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
touch_rst: touch-rst {
rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

6
arch/arm/boot/dts/rk3288-veyron-pinky.dts
View File

@ -55,19 +55,19 @@
&pinctrl {
buttons {
pwr_key_h: pwr-key-h {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
emmc {
emmc_reset: emmc-reset {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_wp_gpio: sdmmc-wp-gpio {
rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

16
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi
View File

@ -16,18 +16,18 @@
* We also have external pulls, so disable the internal ones.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<6 17 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<6 18 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<6 19 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_none_drv_8ma>,
<6 RK_PC1 1 &pcfg_pull_none_drv_8ma>,
<6 RK_PC2 1 &pcfg_pull_none_drv_8ma>,
<6 RK_PC3 1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_none_drv_8ma>;
};
/*
@ -37,12 +37,12 @@
* think there's a card inserted
*/
sdmmc_cd_disabled: sdmmc-cd-disabled {
rockchip,pins = <6 22 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <6 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* This is where we actually hook up CD */
sdmmc_cd_gpio: sdmmc-cd-gpio {
rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

14
arch/arm/boot/dts/rk3288-veyron-speedy.dts
View File

@ -104,39 +104,39 @@
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

74
arch/arm/boot/dts/rk3288-veyron.dtsi
View File

@ -62,12 +62,19 @@
pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* Depending on the actual card populated GPIO4 D4 and D5
* correspond to one of these signals on the module:
*
* D4:
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*
* D5:
* - BT_I2S_WS_BT_RFDISABLE_L
* - No connect
*/
reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>,
<&gpio4 RK_PD5 GPIO_ACTIVE_LOW>;
};
vcc_5v: vcc-5v {
@ -212,8 +219,7 @@
regulator-max-microvolt = <1250000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
regulator-off-in-suspend;
};
};
@ -395,10 +401,6 @@
&uart0 {
status = "okay";
/* We need to go faster than 24MHz, so adjust clock parents / rates */
assigned-clocks = <&cru SCLK_UART0>;
assigned-clock-rates = <48000000>;
/* Pins don't include flow control by default; add that in */
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
@ -450,10 +452,14 @@
pinctrl-names = "default", "sleep";
pinctrl-0 = <
/* Common for sleep and wake, but no owners */
&ddr0_retention
&ddrio_pwroff
&global_pwroff
>;
pinctrl-1 = <
/* Common for sleep and wake, but no owners */
&ddr0_retention
&ddrio_pwroff
&global_pwroff
>;
@ -477,13 +483,13 @@
buttons {
pwr_key_l: pwr-key-l {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
emmc {
emmc_reset: emmc-reset {
rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
/*
@ -491,51 +497,51 @@
* We also have external pulls, so disable the internal ones.
*/
emmc_clk: emmc-clk {
rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_drv_8ma>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_drv_8ma>;
};
emmc_bus8: emmc-bus8 {
rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA1 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA2 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA3 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA4 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA5 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA6 2 &pcfg_pull_none_drv_8ma>,
<3 RK_PA7 2 &pcfg_pull_none_drv_8ma>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
reboot {
ap_warm_reset_h: ap-warm-reset-h {
rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
recovery-switch {
rec_mode_l: rec-mode-l {
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdio0 {
wifi_enable_h: wifienable-h {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* NOTE: mislabelled on schematic; should be bt_enable_h */
bt_enable_l: bt-enable-l {
rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
/*
@ -543,30 +549,30 @@
* We also have external pulls, so disable the internal ones.
*/
sdio0_bus4: sdio0-bus4 {
rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <4 RK_PC4 1 &pcfg_pull_none_drv_8ma>,
<4 RK_PC5 1 &pcfg_pull_none_drv_8ma>,
<4 RK_PC6 1 &pcfg_pull_none_drv_8ma>,
<4 RK_PC7 1 &pcfg_pull_none_drv_8ma>;
};
sdio0_cmd: sdio0-cmd {
rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <4 RK_PD0 1 &pcfg_pull_none_drv_8ma>;
};
sdio0_clk: sdio0-clk {
rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <4 RK_PD1 1 &pcfg_pull_none_drv_8ma>;
};
};
tpm {
tpm_int_h: tpm-int-h {
rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
write-protect {
fw_wp_ap: fw-wp-ap {
rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <7 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

6
arch/arm/boot/dts/rk3288-vyasa.dts
View File

@ -448,13 +448,13 @@
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb_host {
phy_pwr_en: phy-pwr-en {
rockchip,pins = <RK_GPIO2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>;
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>;
};
usb2_pwr_en: usb2-pwr-en {
@ -464,7 +464,7 @@
usb_otg {
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <RK_GPIO0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

290
arch/arm/boot/dts/rk3288.dtsi
View File

@ -64,6 +64,7 @@
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
dynamic-power-coefficient = <370>;
};
cpu1: cpu@501 {
device_type = "cpu";
@ -74,6 +75,7 @@
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
dynamic-power-coefficient = <370>;
};
cpu2: cpu@502 {
device_type = "cpu";
@ -84,6 +86,7 @@
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
dynamic-power-coefficient = <370>;
};
cpu3: cpu@503 {
device_type = "cpu";
@ -94,6 +97,7 @@
#cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
dynamic-power-coefficient = <370>;
};
};
@ -1532,16 +1536,16 @@
hdmi {
hdmi_cec_c0: hdmi-cec-c0 {
rockchip,pins = <7 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC0 2 &pcfg_pull_none>;
};
hdmi_cec_c7: hdmi-cec-c7 {
rockchip,pins = <7 RK_PC7 RK_FUNC_4 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC7 4 &pcfg_pull_none>;
};
hdmi_ddc: hdmi-ddc {
rockchip,pins = <7 19 RK_FUNC_2 &pcfg_pull_none>,
<7 20 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC3 2 &pcfg_pull_none>,
<7 RK_PC4 2 &pcfg_pull_none>;
};
};
@ -1564,421 +1568,421 @@
sleep {
global_pwroff: global-pwroff {
rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
};
ddrio_pwroff: ddrio-pwroff {
rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
};
ddr0_retention: ddr0-retention {
rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>;
};
ddr1_retention: ddr1-retention {
rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
};
};
edp {
edp_hpd: edp-hpd {
rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
rockchip,pins = <7 RK_PB3 2 &pcfg_pull_down>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>,
<0 16 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>,
<0 RK_PC0 1 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <8 4 RK_FUNC_1 &pcfg_pull_none>,
<8 5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <8 RK_PA4 1 &pcfg_pull_none>,
<8 RK_PA5 1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins = <6 9 RK_FUNC_1 &pcfg_pull_none>,
<6 10 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <6 RK_PB1 1 &pcfg_pull_none>,
<6 RK_PB2 1 &pcfg_pull_none>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins = <2 16 RK_FUNC_1 &pcfg_pull_none>,
<2 17 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>,
<2 RK_PC1 1 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
rockchip,pins = <7 17 RK_FUNC_1 &pcfg_pull_none>,
<7 18 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC1 1 &pcfg_pull_none>,
<7 RK_PC2 1 &pcfg_pull_none>;
};
};
i2c5 {
i2c5_xfer: i2c5-xfer {
rockchip,pins = <7 19 RK_FUNC_1 &pcfg_pull_none>,
<7 20 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC3 1 &pcfg_pull_none>,
<7 RK_PC4 1 &pcfg_pull_none>;
};
};
i2s0 {
i2s0_bus: i2s0-bus {
rockchip,pins = <6 0 RK_FUNC_1 &pcfg_pull_none>,
<6 1 RK_FUNC_1 &pcfg_pull_none>,
<6 2 RK_FUNC_1 &pcfg_pull_none>,
<6 3 RK_FUNC_1 &pcfg_pull_none>,
<6 4 RK_FUNC_1 &pcfg_pull_none>,
<6 8 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <6 RK_PA0 1 &pcfg_pull_none>,
<6 RK_PA1 1 &pcfg_pull_none>,
<6 RK_PA2 1 &pcfg_pull_none>,
<6 RK_PA3 1 &pcfg_pull_none>,
<6 RK_PA4 1 &pcfg_pull_none>,
<6 RK_PB0 1 &pcfg_pull_none>;
};
};
lcdc {
lcdc_ctl: lcdc-ctl {
rockchip,pins = <1 24 RK_FUNC_1 &pcfg_pull_none>,
<1 25 RK_FUNC_1 &pcfg_pull_none>,
<1 26 RK_FUNC_1 &pcfg_pull_none>,
<1 27 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>,
<1 RK_PD1 1 &pcfg_pull_none>,
<1 RK_PD2 1 &pcfg_pull_none>,
<1 RK_PD3 1 &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up>;
};
sdmmc_cd: sdmmc-cd {
rockchip,pins = <6 22 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <6 RK_PC6 1 &pcfg_pull_up>;
};
sdmmc_bus1: sdmmc-bus1 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up>,
<6 17 RK_FUNC_1 &pcfg_pull_up>,
<6 18 RK_FUNC_1 &pcfg_pull_up>,
<6 19 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up>,
<6 RK_PC1 1 &pcfg_pull_up>,
<6 RK_PC2 1 &pcfg_pull_up>,
<6 RK_PC3 1 &pcfg_pull_up>;
};
};
sdio0 {
sdio0_bus1: sdio0-bus1 {
rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PC4 1 &pcfg_pull_up>;
};
sdio0_bus4: sdio0-bus4 {
rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>,
<4 21 RK_FUNC_1 &pcfg_pull_up>,
<4 22 RK_FUNC_1 &pcfg_pull_up>,
<4 23 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PC4 1 &pcfg_pull_up>,
<4 RK_PC5 1 &pcfg_pull_up>,
<4 RK_PC6 1 &pcfg_pull_up>,
<4 RK_PC7 1 &pcfg_pull_up>;
};
sdio0_cmd: sdio0-cmd {
rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PD0 1 &pcfg_pull_up>;
};
sdio0_clk: sdio0-clk {
rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <4 RK_PD1 1 &pcfg_pull_none>;
};
sdio0_cd: sdio0-cd {
rockchip,pins = <4 26 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PD2 1 &pcfg_pull_up>;
};
sdio0_wp: sdio0-wp {
rockchip,pins = <4 27 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PD3 1 &pcfg_pull_up>;
};
sdio0_pwr: sdio0-pwr {
rockchip,pins = <4 28 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PD4 1 &pcfg_pull_up>;
};
sdio0_bkpwr: sdio0-bkpwr {
rockchip,pins = <4 29 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PD5 1 &pcfg_pull_up>;
};
sdio0_int: sdio0-int {
rockchip,pins = <4 30 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PD6 1 &pcfg_pull_up>;
};
};
sdio1 {
sdio1_bus1: sdio1-bus1 {
rockchip,pins = <3 24 4 &pcfg_pull_up>;
rockchip,pins = <3 RK_PD0 4 &pcfg_pull_up>;
};
sdio1_bus4: sdio1-bus4 {
rockchip,pins = <3 24 4 &pcfg_pull_up>,
<3 25 4 &pcfg_pull_up>,
<3 26 4 &pcfg_pull_up>,
<3 27 4 &pcfg_pull_up>;
rockchip,pins = <3 RK_PD0 4 &pcfg_pull_up>,
<3 RK_PD1 4 &pcfg_pull_up>,
<3 RK_PD2 4 &pcfg_pull_up>,
<3 RK_PD3 4 &pcfg_pull_up>;
};
sdio1_cd: sdio1-cd {
rockchip,pins = <3 28 4 &pcfg_pull_up>;
rockchip,pins = <3 RK_PD4 4 &pcfg_pull_up>;
};
sdio1_wp: sdio1-wp {
rockchip,pins = <3 29 4 &pcfg_pull_up>;
rockchip,pins = <3 RK_PD5 4 &pcfg_pull_up>;
};
sdio1_bkpwr: sdio1-bkpwr {
rockchip,pins = <3 30 4 &pcfg_pull_up>;
rockchip,pins = <3 RK_PD6 4 &pcfg_pull_up>;
};
sdio1_int: sdio1-int {
rockchip,pins = <3 31 4 &pcfg_pull_up>;
rockchip,pins = <3 RK_PD7 4 &pcfg_pull_up>;
};
sdio1_cmd: sdio1-cmd {
rockchip,pins = <4 6 4 &pcfg_pull_up>;
rockchip,pins = <4 RK_PA6 4 &pcfg_pull_up>;
};
sdio1_clk: sdio1-clk {
rockchip,pins = <4 7 4 &pcfg_pull_none>;
rockchip,pins = <4 RK_PA7 4 &pcfg_pull_none>;
};
sdio1_pwr: sdio1-pwr {
rockchip,pins = <4 9 4 &pcfg_pull_up>;
rockchip,pins = <4 RK_PB1 4 &pcfg_pull_up>;
};
};
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <3 RK_PC0 2 &pcfg_pull_up>;
};
emmc_pwr: emmc-pwr {
rockchip,pins = <3 9 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <3 RK_PB1 2 &pcfg_pull_up>;
};
emmc_bus1: emmc-bus1 {
rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>;
};
emmc_bus4: emmc-bus4 {
rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>,
<3 1 RK_FUNC_2 &pcfg_pull_up>,
<3 2 RK_FUNC_2 &pcfg_pull_up>,
<3 3 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>,
<3 RK_PA1 2 &pcfg_pull_up>,
<3 RK_PA2 2 &pcfg_pull_up>,
<3 RK_PA3 2 &pcfg_pull_up>;
};
emmc_bus8: emmc-bus8 {
rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_up>,
<3 1 RK_FUNC_2 &pcfg_pull_up>,
<3 2 RK_FUNC_2 &pcfg_pull_up>,
<3 3 RK_FUNC_2 &pcfg_pull_up>,
<3 4 RK_FUNC_2 &pcfg_pull_up>,
<3 5 RK_FUNC_2 &pcfg_pull_up>,
<3 6 RK_FUNC_2 &pcfg_pull_up>,
<3 7 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>,
<3 RK_PA1 2 &pcfg_pull_up>,
<3 RK_PA2 2 &pcfg_pull_up>,
<3 RK_PA3 2 &pcfg_pull_up>,
<3 RK_PA4 2 &pcfg_pull_up>,
<3 RK_PA5 2 &pcfg_pull_up>,
<3 RK_PA6 2 &pcfg_pull_up>,
<3 RK_PA7 2 &pcfg_pull_up>;
};
};
spi0 {
spi0_clk: spi0-clk {
rockchip,pins = <5 12 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <5 RK_PB4 1 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
rockchip,pins = <5 13 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <5 RK_PB5 1 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
rockchip,pins = <5 14 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <5 RK_PB6 1 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
rockchip,pins = <5 15 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <5 RK_PB7 1 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
rockchip,pins = <5 16 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <5 RK_PC0 1 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
rockchip,pins = <7 12 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <7 RK_PB4 2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins = <7 13 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <7 RK_PB5 2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
rockchip,pins = <7 14 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <7 RK_PB6 2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
rockchip,pins = <7 15 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <7 RK_PB7 2 &pcfg_pull_up>;
};
};
spi2 {
spi2_cs1: spi2-cs1 {
rockchip,pins = <8 3 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <8 RK_PA3 1 &pcfg_pull_up>;
};
spi2_clk: spi2-clk {
rockchip,pins = <8 6 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <8 RK_PA6 1 &pcfg_pull_up>;
};
spi2_cs0: spi2-cs0 {
rockchip,pins = <8 7 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <8 RK_PA7 1 &pcfg_pull_up>;
};
spi2_rx: spi2-rx {
rockchip,pins = <8 8 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <8 RK_PB0 1 &pcfg_pull_up>;
};
spi2_tx: spi2-tx {
rockchip,pins = <8 9 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <8 RK_PB1 1 &pcfg_pull_up>;
};
};
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>,
<4 17 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <4 RK_PC0 1 &pcfg_pull_up>,
<4 RK_PC1 1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <4 RK_PC2 1 &pcfg_pull_up>;
};
uart0_rts: uart0-rts {
rockchip,pins = <4 19 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <4 RK_PC3 1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <5 8 RK_FUNC_1 &pcfg_pull_up>,
<5 9 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <5 RK_PB0 1 &pcfg_pull_up>,
<5 RK_PB1 1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
rockchip,pins = <5 10 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <5 RK_PB2 1 &pcfg_pull_up>;
};
uart1_rts: uart1-rts {
rockchip,pins = <5 11 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <5 RK_PB3 1 &pcfg_pull_none>;
};
};
uart2 {
uart2_xfer: uart2-xfer {
rockchip,pins = <7 22 RK_FUNC_1 &pcfg_pull_up>,
<7 23 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC6 1 &pcfg_pull_up>,
<7 RK_PC7 1 &pcfg_pull_none>;
};
/* no rts / cts for uart2 */
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins = <7 7 RK_FUNC_1 &pcfg_pull_up>,
<7 8 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PA7 1 &pcfg_pull_up>,
<7 RK_PB0 1 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
rockchip,pins = <7 9 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <7 RK_PB1 1 &pcfg_pull_up>;
};
uart3_rts: uart3-rts {
rockchip,pins = <7 10 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PB2 1 &pcfg_pull_none>;
};
};
uart4 {
uart4_xfer: uart4-xfer {
rockchip,pins = <5 15 3 &pcfg_pull_up>,
<5 14 3 &pcfg_pull_none>;
rockchip,pins = <5 RK_PB7 3 &pcfg_pull_up>,
<5 RK_PB6 3 &pcfg_pull_none>;
};
uart4_cts: uart4-cts {
rockchip,pins = <5 12 3 &pcfg_pull_up>;
rockchip,pins = <5 RK_PB4 3 &pcfg_pull_up>;
};
uart4_rts: uart4-rts {
rockchip,pins = <5 13 3 &pcfg_pull_none>;
rockchip,pins = <5 RK_PB5 3 &pcfg_pull_none>;
};
};
tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PA0 1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins = <7 1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <7 RK_PA1 1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins = <7 22 3 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC6 3 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
rockchip,pins = <7 23 3 &pcfg_pull_none>;
rockchip,pins = <7 RK_PC7 3 &pcfg_pull_none>;
};
};
gmac {
rgmii_pins: rgmii-pins {
rockchip,pins = <3 30 3 &pcfg_pull_none>,
<3 31 3 &pcfg_pull_none>,
<3 26 3 &pcfg_pull_none>,
<3 27 3 &pcfg_pull_none>,
<3 28 3 &pcfg_pull_none_12ma>,
<3 29 3 &pcfg_pull_none_12ma>,
<3 24 3 &pcfg_pull_none_12ma>,
<3 25 3 &pcfg_pull_none_12ma>,
<4 0 3 &pcfg_pull_none>,
<4 5 3 &pcfg_pull_none>,
<4 6 3 &pcfg_pull_none>,
<4 9 3 &pcfg_pull_none_12ma>,
<4 4 3 &pcfg_pull_none_12ma>,
<4 1 3 &pcfg_pull_none>,
<4 3 3 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD6 3 &pcfg_pull_none>,
<3 RK_PD7 3 &pcfg_pull_none>,
<3 RK_PD2 3 &pcfg_pull_none>,
<3 RK_PD3 3 &pcfg_pull_none>,
<3 RK_PD4 3 &pcfg_pull_none_12ma>,
<3 RK_PD5 3 &pcfg_pull_none_12ma>,
<3 RK_PD0 3 &pcfg_pull_none_12ma>,
<3 RK_PD1 3 &pcfg_pull_none_12ma>,
<4 RK_PA0 3 &pcfg_pull_none>,
<4 RK_PA5 3 &pcfg_pull_none>,
<4 RK_PA6 3 &pcfg_pull_none>,
<4 RK_PB1 3 &pcfg_pull_none_12ma>,
<4 RK_PA4 3 &pcfg_pull_none_12ma>,
<4 RK_PA1 3 &pcfg_pull_none>,
<4 RK_PA3 3 &pcfg_pull_none>;
};
rmii_pins: rmii-pins {
rockchip,pins = <3 30 3 &pcfg_pull_none>,
<3 31 3 &pcfg_pull_none>,
<3 28 3 &pcfg_pull_none>,
<3 29 3 &pcfg_pull_none>,
<4 0 3 &pcfg_pull_none>,
<4 5 3 &pcfg_pull_none>,
<4 4 3 &pcfg_pull_none>,
<4 1 3 &pcfg_pull_none>,
<4 2 3 &pcfg_pull_none>,
<4 3 3 &pcfg_pull_none>;
rockchip,pins = <3 RK_PD6 3 &pcfg_pull_none>,
<3 RK_PD7 3 &pcfg_pull_none>,
<3 RK_PD4 3 &pcfg_pull_none>,
<3 RK_PD5 3 &pcfg_pull_none>,
<4 RK_PA0 3 &pcfg_pull_none>,
<4 RK_PA5 3 &pcfg_pull_none>,
<4 RK_PA4 3 &pcfg_pull_none>,
<4 RK_PA1 3 &pcfg_pull_none>,
<4 RK_PA2 3 &pcfg_pull_none>,
<4 RK_PA3 3 &pcfg_pull_none>;
};
};
spdif {
spdif_tx: spdif-tx {
rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <6 RK_PB3 1 &pcfg_pull_none>;
};
};
};

138
arch/arm/boot/dts/rv1108.dtsi
View File

@ -682,58 +682,58 @@
emmc {
emmc_bus8: emmc-bus8 {
rockchip,pins = <2 RK_PA0 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA1 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA6 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA7 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
rockchip,pins = <2 RK_PA0 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA1 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA2 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA3 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA4 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA5 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA6 2 &pcfg_pull_up_drv_8ma>,
<2 RK_PA7 2 &pcfg_pull_up_drv_8ma>;
};
emmc_clk: emmc-clk {
rockchip,pins = <2 RK_PB6 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none_drv_8ma>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <2 RK_PB4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;
rockchip,pins = <2 RK_PB4 2 &pcfg_pull_up_drv_8ma>;
};
};
gmac {
rmii_pins: rmii-pins {
rockchip,pins = <1 RK_PC5 RK_FUNC_2 &pcfg_pull_none>,
<1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>,
<1 RK_PC4 RK_FUNC_2 &pcfg_pull_none>,
<1 RK_PB2 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
<1 RK_PB3 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
<1 RK_PB4 RK_FUNC_3 &pcfg_pull_none_drv_12ma>,
<1 RK_PB5 RK_FUNC_3 &pcfg_pull_none>,
<1 RK_PB6 RK_FUNC_3 &pcfg_pull_none>,
<1 RK_PB7 RK_FUNC_3 &pcfg_pull_none>,
<1 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>,
<1 RK_PC3 2 &pcfg_pull_none>,
<1 RK_PC4 2 &pcfg_pull_none>,
<1 RK_PB2 3 &pcfg_pull_none_drv_12ma>,
<1 RK_PB3 3 &pcfg_pull_none_drv_12ma>,
<1 RK_PB4 3 &pcfg_pull_none_drv_12ma>,
<1 RK_PB5 3 &pcfg_pull_none>,
<1 RK_PB6 3 &pcfg_pull_none>,
<1 RK_PB7 3 &pcfg_pull_none>,
<1 RK_PC2 3 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
<0 RK_PB2 RK_FUNC_1 &pcfg_pull_none_smt>;
rockchip,pins = <0 RK_PB1 1 &pcfg_pull_none_smt>,
<0 RK_PB2 1 &pcfg_pull_none_smt>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
<2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <2 RK_PD3 1 &pcfg_pull_up>,
<2 RK_PD4 1 &pcfg_pull_up>;
};
};
i2c2m1 {
i2c2m1_xfer: i2c2m1-xfer {
rockchip,pins = <0 RK_PC2 RK_FUNC_2 &pcfg_pull_none>,
<0 RK_PC6 RK_FUNC_3 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC2 2 &pcfg_pull_none>,
<0 RK_PC6 3 &pcfg_pull_none>;
};
i2c2m1_gpio: i2c2m1-gpio {
@ -744,8 +744,8 @@
i2c2m05v {
i2c2m05v_xfer: i2c2m05v-xfer {
rockchip,pins = <1 RK_PD5 RK_FUNC_2 &pcfg_pull_none>,
<1 RK_PD4 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD5 2 &pcfg_pull_none>,
<1 RK_PD4 2 &pcfg_pull_none>;
};
i2c2m05v_gpio: i2c2m05v-gpio {
@ -756,123 +756,123 @@
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins = <0 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
<0 RK_PC4 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <0 RK_PB6 1 &pcfg_pull_none>,
<0 RK_PC4 2 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC5 1 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins = <0 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC6 1 &pcfg_pull_none>;
};
};
pwm3 {
pwm3_pin: pwm3-pin {
rockchip,pins = <0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PC0 1 &pcfg_pull_none>;
};
};
pwm4 {
pwm4_pin: pwm4-pin {
rockchip,pins = <1 RK_PC1 RK_FUNC_3 &pcfg_pull_none>;
rockchip,pins = <1 RK_PC1 3 &pcfg_pull_none>;
};
};
pwm5 {
pwm5_pin: pwm5-pin {
rockchip,pins = <1 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PA7 2 &pcfg_pull_none>;
};
};
pwm6 {
pwm6_pin: pwm6-pin {
rockchip,pins = <1 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB0 2 &pcfg_pull_none>;
};
};
pwm7 {
pwm7_pin: pwm7-pin {
rockchip,pins = <1 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <1 RK_PB1 2 &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
rockchip,pins = <3 RK_PC4 1 &pcfg_pull_none_drv_4ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <3 RK_PC5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
rockchip,pins = <3 RK_PC5 1 &pcfg_pull_up_drv_4ma>;
};
sdmmc_cd: sdmmc-cd {
rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_up_drv_4ma>;
};
sdmmc_bus1: sdmmc-bus1 {
rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
rockchip,pins = <3 RK_PC3 1 &pcfg_pull_up_drv_4ma>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <3 RK_PC3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
<3 RK_PC2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
<3 RK_PC1 RK_FUNC_1 &pcfg_pull_up_drv_4ma>,
<3 RK_PC0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>;
rockchip,pins = <3 RK_PC3 1 &pcfg_pull_up_drv_4ma>,
<3 RK_PC2 1 &pcfg_pull_up_drv_4ma>,
<3 RK_PC1 1 &pcfg_pull_up_drv_4ma>,
<3 RK_PC0 1 &pcfg_pull_up_drv_4ma>;
};
};
spim0 {
spim0_clk: spim0-clk {
rockchip,pins = <1 RK_PD0 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PD0 2 &pcfg_pull_up>;
};
spim0_cs0: spim0-cs0 {
rockchip,pins = <1 RK_PD1 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PD1 2 &pcfg_pull_up>;
};
spim0_tx: spim0-tx {
rockchip,pins = <1 RK_PD3 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PD3 2 &pcfg_pull_up>;
};
spim0_rx: spim0-rx {
rockchip,pins = <1 RK_PD2 RK_FUNC_2 &pcfg_pull_up>;
rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up>;
};
};
spim1 {
spim1_clk: spim1-clk {
rockchip,pins = <0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
};
spim1_cs0: spim1-cs0 {
rockchip,pins = <0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PA4 1 &pcfg_pull_up>;
};
spim1_rx: spim1-rx {
rockchip,pins = <0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PB0 1 &pcfg_pull_up>;
};
spim1_tx: spim1-tx {
rockchip,pins = <0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
rockchip,pins = <0 RK_PA7 1 &pcfg_pull_up>;
};
};
tsadc {
otp_out: otp-out {
rockchip,pins = <0 RK_PB7 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
};
otp_gpio: otp-gpio {
@ -882,16 +882,16 @@
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins = <3 RK_PA6 RK_FUNC_1 &pcfg_pull_up>,
<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA6 1 &pcfg_pull_up>,
<3 RK_PA5 1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins = <3 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins = <3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <3 RK_PA3 1 &pcfg_pull_none>;
};
uart0_rts_gpio: uart0-rts-gpio {
@ -901,40 +901,40 @@
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins = <1 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
<1 RK_PD2 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD3 1 &pcfg_pull_up>,
<1 RK_PD2 1 &pcfg_pull_none>;
};
uart1_cts: uart1-cts {
rockchip,pins = <1 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>;
};
uart1_rts: uart1-rts {
rockchip,pins = <1 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD1 1 &pcfg_pull_none>;
};
};
uart2m0 {
uart2m0_xfer: uart2m0-xfer {
rockchip,pins = <2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>,
<2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <2 RK_PD2 1 &pcfg_pull_up>,
<2 RK_PD1 1 &pcfg_pull_none>;
};
};
uart2m1 {
uart2m1_xfer: uart2m1-xfer {
rockchip,pins = <3 RK_PC3 RK_FUNC_2 &pcfg_pull_up>,
<3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
rockchip,pins = <3 RK_PC3 2 &pcfg_pull_up>,
<3 RK_PC2 2 &pcfg_pull_none>;
};
};
uart2_5v {
uart2_5v_cts: uart2_5v-cts {
rockchip,pins = <1 RK_PD4 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>;
};
uart2_5v_rts: uart2_5v-rts {
rockchip,pins = <1 RK_PD5 RK_FUNC_1 &pcfg_pull_none>;
rockchip,pins = <1 RK_PD5 1 &pcfg_pull_none>;
};
};
};