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[libata sata_mv] implement a bunch of errata workarounds
Based largely on the GPL'd Marvell vendor driver.
This commit is contained in:
Jeff Garzik
parent
9a68c1b958
commit
bca1c4eb94
@ -50,6 +50,8 @@ enum {
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MV_PCI_REG_BASE = 0,
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MV_IRQ_COAL_REG_BASE = 0x18000, /* 6xxx part only */
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MV_SATAHC0_REG_BASE = 0x20000,
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MV_GPIO_PORT_CTL = 0x104f0,
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MV_RESET_CFG = 0x180d8,
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MV_PCI_REG_SZ = MV_MAJOR_REG_AREA_SZ,
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MV_SATAHC_REG_SZ = MV_MAJOR_REG_AREA_SZ,
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@ -148,6 +150,11 @@ enum {
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/* SATA registers */
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SATA_STATUS_OFS = 0x300, /* ctrl, err regs follow status */
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SATA_ACTIVE_OFS = 0x350,
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PHY_MODE4 = 0x314,
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PHY_MODE2 = 0x330,
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SATA_INTERFACE_CTL = 0x050,
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MV_M2_PREAMP_MASK = 0x7e0,
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/* Port registers */
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EDMA_CFG_OFS = 0,
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@ -201,14 +208,26 @@ enum {
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EDMA_DS = (1 << 1),
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ATA_RST = (1 << 2),
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EDMA_ARB_CFG = 0x38,
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EDMA_NO_SNOOP = (1 << 6),
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/* Host private flags (hp_flags) */
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MV_HP_FLAG_MSI = (1 << 0),
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MV_HP_ERRATA_60X1A1 = (1 << 1),
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MV_HP_ERRATA_60X1B0 = (1 << 2),
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MV_HP_ERRATA_50XXB0 = (1 << 3),
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MV_HP_ERRATA_50XXB1 = (1 << 4),
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MV_HP_ERRATA_50XXB2 = (1 << 5),
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MV_HP_50XX = (1 << 6),
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/* Port private flags (pp_flags) */
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MV_PP_FLAG_EDMA_EN = (1 << 0),
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MV_PP_FLAG_EDMA_DS_ACT = (1 << 1),
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};
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#define IS_50XX(hpriv) ((hpriv)->hp_flags & MV_HP_50XX)
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#define IS_60XX(hpriv) (((hpriv)->hp_flags & MV_HP_50XX) == 0)
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enum {
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/* Our DMA boundary is determined by an ePRD being unable to handle
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* anything larger than 64KB
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@ -256,8 +275,14 @@ struct mv_port_priv {
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u32 pp_flags;
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};
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struct mv_port_signal {
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u32 amps;
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u32 pre;
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};
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struct mv_host_priv {
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u32 hp_flags;
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struct mv_port_signal signal[8];
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};
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static void mv_irq_clear(struct ata_port *ap);
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@ -354,10 +379,12 @@ static struct ata_port_info mv_port_info[] = {
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};
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static const struct pci_device_id mv_pci_tbl[] = {
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#if 0 /* unusably broken right now */
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{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5040), 0, 0, chip_504x},
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{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5041), 0, 0, chip_504x},
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{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5080), 0, 0, chip_508x},
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{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5081), 0, 0, chip_508x},
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#endif
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{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x6040), 0, 0, chip_604x},
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{PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x6041), 0, 0, chip_604x},
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@ -402,9 +429,9 @@ static inline void __iomem *mv_ap_base(struct ata_port *ap)
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return mv_port_base(ap->host_set->mmio_base, ap->port_no);
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}
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static inline int mv_get_hc_count(unsigned long hp_flags)
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static inline int mv_get_hc_count(unsigned long host_flags)
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{
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return ((hp_flags & MV_FLAG_DUAL_HC) ? 2 : 1);
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return ((host_flags & MV_FLAG_DUAL_HC) ? 2 : 1);
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}
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static void mv_irq_clear(struct ata_port *ap)
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@ -694,6 +721,7 @@ static inline void mv_priv_free(struct mv_port_priv *pp, struct device *dev)
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static int mv_port_start(struct ata_port *ap)
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{
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struct device *dev = ap->host_set->dev;
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struct mv_host_priv *hpriv = ap->host_set->private_data;
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struct mv_port_priv *pp;
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void __iomem *port_mmio = mv_ap_base(ap);
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void *mem;
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@ -751,6 +779,15 @@ static int mv_port_start(struct ata_port *ap)
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writelfl(pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK,
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port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);
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if (hpriv->hp_flags & MV_HP_ERRATA_60X1A1) {
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u32 new_tmp, tmp;
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new_tmp = tmp = readl(port_mmio + EDMA_ARB_CFG);
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new_tmp &= ~EDMA_NO_SNOOP;
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if (new_tmp != tmp)
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writel(new_tmp, port_mmio + EDMA_ARB_CFG);
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}
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pp->req_producer = pp->rsp_consumer = 0;
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/* Don't turn on EDMA here...do it before DMA commands only. Else
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@ -1206,6 +1243,52 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance,
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return IRQ_RETVAL(handled);
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}
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static void mv_phy_errata5(struct ata_port *ap)
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{
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/* FIXME */
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}
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static void mv_phy_errata6(struct ata_port *ap)
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{
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struct mv_host_priv *hpriv = ap->host_set->private_data;
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u32 hp_flags = hpriv->hp_flags;
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void __iomem *port_mmio = mv_ap_base(ap);
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int fix_phy_mode4 =
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hp_flags & (MV_HP_ERRATA_60X1A1 | MV_HP_ERRATA_60X1B0);
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u32 m2;
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if (fix_phy_mode4) {
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u32 tmp, m4;
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m4 = readl(port_mmio + PHY_MODE4);
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tmp = readl(port_mmio + 0x310);
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m4 = (m4 & ~(1 << 1)) | (1 << 0);
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writel(m4, port_mmio + PHY_MODE4);
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writel(tmp, port_mmio + 0x310);
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}
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/* Revert values of pre-emphasis and signal amps to the saved ones */
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m2 = readl(port_mmio + PHY_MODE2);
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m2 &= ~MV_M2_PREAMP_MASK;
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m2 |= hpriv->signal[ap->port_no].amps;
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m2 |= hpriv->signal[ap->port_no].pre;
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writel(m2, port_mmio + PHY_MODE2);
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}
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static void mv_phy_errata(struct ata_port *ap)
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{
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struct mv_host_priv *hpriv = ap->host_set->private_data;
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if (IS_50XX(hpriv))
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mv_phy_errata5(ap);
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else
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mv_phy_errata6(ap);
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}
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/**
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* mv_phy_reset - Perform eDMA reset followed by COMRESET
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* @ap: ATA channel to manipulate
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@ -1220,6 +1303,7 @@ static irqreturn_t mv_interrupt(int irq, void *dev_instance,
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static void mv_phy_reset(struct ata_port *ap)
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{
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struct mv_port_priv *pp = ap->private_data;
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struct mv_host_priv *hpriv = ap->host_set->private_data;
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void __iomem *port_mmio = mv_ap_base(ap);
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struct ata_taskfile tf;
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struct ata_device *dev = &ap->device[0];
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@ -1230,6 +1314,13 @@ static void mv_phy_reset(struct ata_port *ap)
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mv_stop_dma(ap);
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writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS);
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if (IS_60XX(hpriv)) {
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u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL);
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ifctl |= (1 << 12) | (1 << 7);
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writelfl(ifctl, port_mmio + SATA_INTERFACE_CTL);
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}
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udelay(25); /* allow reset propagation */
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/* Spec never mentions clearing the bit. Marvell's driver does
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@ -1237,6 +1328,8 @@ static void mv_phy_reset(struct ata_port *ap)
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*/
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writelfl(0, port_mmio + EDMA_CMD_OFS);
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mv_phy_errata(ap);
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DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x "
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"SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS),
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mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL));
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@ -1283,7 +1376,7 @@ static void mv_phy_reset(struct ata_port *ap)
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pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
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printk("EXIT\n");
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VPRINTK("EXIT\n");
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}
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/**
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@ -1380,8 +1473,152 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
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readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));
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}
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static void mv_enable_leds5(struct mv_host_priv *hpriv, void __iomem *mmio)
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{
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/* FIXME */
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}
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static void mv_enable_leds6(struct mv_host_priv *hpriv, void __iomem *mmio)
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{
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if (hpriv->hp_flags & MV_HP_ERRATA_60X1A1)
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writel(0x00020060, mmio + MV_GPIO_PORT_CTL);
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else if (hpriv->hp_flags & MV_HP_ERRATA_60X1B0)
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writel(0x00000060, mmio + MV_GPIO_PORT_CTL);
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}
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static void mv_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio)
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{
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if (IS_50XX(hpriv))
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mv_enable_leds5(hpriv, mmio);
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else
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mv_enable_leds6(hpriv, mmio);
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}
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static void mv_cfg_signal5(struct mv_host_priv *hpriv, int idx,
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void __iomem *mmio)
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{
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/* FIXME */
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}
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static void mv_cfg_signal6(struct mv_host_priv *hpriv, int idx,
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void __iomem *mmio)
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{
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void __iomem *port_mmio;
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u32 tmp;
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if (hpriv->hp_flags & MV_HP_ERRATA_60X1A1) {
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hpriv->signal[idx].amps = 0x5 << 8;
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hpriv->signal[idx].pre = 0x3 << 5;
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return;
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}
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assert (hpriv->hp_flags & MV_HP_ERRATA_60X1B0);
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tmp = readl(mmio + MV_RESET_CFG);
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if ((tmp & (1 << 0)) == 0) {
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hpriv->signal[idx].amps = 0x4 << 8;
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hpriv->signal[idx].pre = 0x1 << 5;
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return;
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}
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port_mmio = mv_port_base(mmio, idx);
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tmp = readl(port_mmio + PHY_MODE2);
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hpriv->signal[idx].amps = tmp & 0x700; /* bits 10:8 */
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hpriv->signal[idx].pre = tmp & 0xe0; /* bits 7:5 */
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}
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static int mv_cfg_errata(struct pci_dev *pdev, struct mv_host_priv *hpriv,
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unsigned int board_idx)
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{
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u8 rev_id;
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u32 hp_flags = hpriv->hp_flags;
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pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
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switch(board_idx) {
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case chip_504x:
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case chip_508x:
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hp_flags |= MV_HP_50XX;
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if (pdev->device == 0x5080) {
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switch (rev_id) {
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case 0x0:
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dev_printk(KERN_WARNING, &pdev->dev,
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"Applying B0 workarounds to unknown rev 0\n");
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/* fall through */
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case 0x1:
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hp_flags |= MV_HP_ERRATA_50XXB0;
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break;
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case 0x2:
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hp_flags |= MV_HP_ERRATA_50XXB1;
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break;
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case 0x3:
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hp_flags |= MV_HP_ERRATA_50XXB2;
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break;
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default:
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dev_printk(KERN_WARNING, &pdev->dev,
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"Applying B2 workarounds to future rev\n");
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hp_flags |= MV_HP_ERRATA_50XXB2;
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break;
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}
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} else {
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switch (rev_id) {
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case 0x0:
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hp_flags |= MV_HP_ERRATA_50XXB0;
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break;
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case 0x1:
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dev_printk(KERN_WARNING, &pdev->dev,
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"Applying B1 workarounds to unknown rev 1\n");
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/* fall through */
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case 0x2:
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hp_flags |= MV_HP_ERRATA_50XXB1;
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break;
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default:
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dev_printk(KERN_WARNING, &pdev->dev,
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"Applying B2 workarounds to future rev\n");
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/* fall through */
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case 0x3:
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hp_flags |= MV_HP_ERRATA_50XXB2;
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break;
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}
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}
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break;
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case chip_604x:
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case chip_608x:
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switch (rev_id) {
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case 0x0:
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dev_printk(KERN_WARNING, &pdev->dev,
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"Applying A1 workarounds to unknown rev 0\n");
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/* fall through */
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case 0x1:
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hp_flags |= MV_HP_ERRATA_60X1A1;
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break;
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default:
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dev_printk(KERN_WARNING, &pdev->dev,
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"Applying B0 workarounds to future rev\n");
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/* fall through */
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case 0x2:
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hp_flags |= MV_HP_ERRATA_60X1B0;
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break;
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}
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break;
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default:
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printk(KERN_ERR DRV_NAME ": BUG: invalid board index %u\n", board_idx);
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return 1;
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}
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hpriv->hp_flags = hp_flags;
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return 0;
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}
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/**
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* mv_host_init - Perform some early initialization of the host.
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* @pdev: host PCI device
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* @probe_ent: early data struct representing the host
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*
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* If possible, do an early global reset of the host. Then do
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@ -1390,11 +1627,28 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio)
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* LOCKING:
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* Inherited from caller.
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*/
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static int mv_host_init(struct ata_probe_ent *probe_ent)
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static int mv_host_init(struct pci_dev *pdev, struct ata_probe_ent *probe_ent,
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unsigned int board_idx)
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{
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int rc = 0, n_hc, port, hc;
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void __iomem *mmio = probe_ent->mmio_base;
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void __iomem *port_mmio;
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struct mv_host_priv *hpriv = probe_ent->private_data;
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rc = mv_cfg_errata(pdev, hpriv, board_idx);
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if (rc)
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goto done;
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n_hc = mv_get_hc_count(probe_ent->host_flags);
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probe_ent->n_ports = MV_PORTS_PER_HC * n_hc;
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if (IS_50XX(hpriv)) {
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for (port = 0; port < probe_ent->n_ports; port++)
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mv_cfg_signal5(hpriv, port, mmio);
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} else {
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for (port = 0; port < probe_ent->n_ports; port++)
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mv_cfg_signal6(hpriv, port, mmio);
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}
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if ((MV_FLAG_GLBL_SFT_RST & probe_ent->host_flags) &&
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mv_global_soft_reset(probe_ent->mmio_base)) {
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@ -1402,8 +1656,7 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
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goto done;
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}
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n_hc = mv_get_hc_count(probe_ent->host_flags);
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probe_ent->n_ports = MV_PORTS_PER_HC * n_hc;
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mv_enable_leds(hpriv, mmio);
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for (port = 0; port < probe_ent->n_ports; port++) {
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port_mmio = mv_port_base(mmio, port);
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@ -1435,6 +1688,7 @@ static int mv_host_init(struct ata_probe_ent *probe_ent)
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readl(mmio + HC_MAIN_IRQ_MASK_OFS),
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readl(mmio + PCI_IRQ_CAUSE_OFS),
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readl(mmio + PCI_IRQ_MASK_OFS));
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done:
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return rc;
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}
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@ -1540,7 +1794,7 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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probe_ent->private_data = hpriv;
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/* initialize adapter */
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rc = mv_host_init(probe_ent);
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rc = mv_host_init(pdev, probe_ent, board_idx);
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if (rc) {
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goto err_out_hpriv;
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}
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