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ARM: dts: uniphier: update to new Denali NAND binding

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With commit d8e8fd0ebf ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

In the new binding, the number of connected chips are described in
DT instead of run-time probed.

I added just one chip to the reference boards, where we do not know
if the on-board NAND device is a single chip or multiple chips.
If we added too many chips into DT, it would end up with the timeout
error in nand_scan_ident().

I changed all the pinctrl properties to use the single CS.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2019-06-21 19:53:16 +09:00
parent a188339ca5
commit bc8841f0c1
9 changed files with 30 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/uniphier-ld4-ref.dts
View File

@ -77,4 +77,8 @@
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};

4
arch/arm/boot/dts/uniphier-ld4.dtsi
View File

@ -403,9 +403,11 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;

4
arch/arm/boot/dts/uniphier-ld6b-ref.dts
View File

@ -90,4 +90,8 @@
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};

4
arch/arm/boot/dts/uniphier-pro4-ref.dts
View File

@ -98,4 +98,8 @@
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};

2
arch/arm/boot/dts/uniphier-pro4.dtsi
View File

@ -593,6 +593,8 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;

4
arch/arm/boot/dts/uniphier-pro5.dtsi
View File

@ -458,9 +458,11 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;

4
arch/arm/boot/dts/uniphier-pxs2.dtsi
View File

@ -766,9 +766,11 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;

4
arch/arm/boot/dts/uniphier-sld8-ref.dts
View File

@ -81,4 +81,8 @@
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};

4
arch/arm/boot/dts/uniphier-sld8.dtsi
View File

@ -407,9 +407,11 @@
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc";
clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;