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kvm/arm fixes for 4.16, take 2
- Peace of mind locking fix in vgic_mmio_read_pending - Allow hw-mapped interrupts to be reset when the VM resets - Fix GICv2 multi-source SGI injection - Fix MMIO synchronization for GICv2 on v3 emulation - Remove excess verbosity on the console -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAlqqp/cVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDAGkP/2LMhFN561PKlqgu5V4hFvowJiXb Gbb/qi095vtDGccbKmJKAZp3jyOM2oJEMUkx5RBYglWjW0mxb3zPAAxhldXiqv/2 CrOGGlS/FwfyIjCt7870pltDOIgRmk8Fv/MyQjjGKF6VAghd6yVHIZiOUjiriUyz 6hNyc2znLm0tBqm4j3HTXKHpD23YseW387pQoeQ03/WiXiZ60O3e3k0yppXO81qE b7TGT4Bz04mxlAISZVZeTmG7P7P4ej6+NhOH+1kxacseLzHdECPBA0JRcwRpfLkP 5JFodUOX7/KHpvpMLUxRNRnLBei9WUL4o2LAEV0qDaj7nlAud0kKUm22RLaVKDm+ 8FSUQ12XKqnZsRrl6IizU1oAb1I1iV3j9HF5iNf3mk9AO27REGk0b8fDyRzDj300 xpySgvIgA+f+EyY+3ve0AmEUa5QKz/WLuik2ZCqpVOuufrO8XpS+zjn1L1tzTlkR 95EahDA7enutw47G0uWtxoPMeU4HTZS/CAiFwUbq8BEK7T3Rct7UySPLwgeYBoji MUlCRhPyAANCJmtO6rpOS3htkQ3XkkO1DVIGLuWC5Zl00W1T5I5+VRrVL1YI4v3O d2ui9r5X5Vmg4OUdhr2D9fXgPWWKEbqD90jv40rGLsMl0g/IwrC+o2VxgYxSeu5x CLUYILwEA5NDZSof =iyYE -----END PGP SIGNATURE----- Merge tag 'kvm-arm-fixes-for-v4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master kvm/arm fixes for 4.16, take 2 - Peace of mind locking fix in vgic_mmio_read_pending - Allow hw-mapped interrupts to be reset when the VM resets - Fix GICv2 multi-source SGI injection - Fix MMIO synchronization for GICv2 on v3 emulation - Remove excess verbosity on the console
This commit is contained in:
commit
bb9b4dbe0d
@ -363,8 +363,6 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
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{
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int ret = 0;
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vcpu_load(vcpu);
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trace_kvm_set_guest_debug(vcpu, dbg->control);
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if (dbg->control & ~KVM_GUESTDBG_VALID_MASK) {
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@ -386,7 +384,6 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
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}
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out:
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vcpu_put(vcpu);
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return ret;
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}
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@ -360,6 +360,7 @@ void kvm_vgic_put(struct kvm_vcpu *vcpu);
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bool kvm_vcpu_has_pending_irqs(struct kvm_vcpu *vcpu);
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void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
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void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
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void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid);
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void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg);
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@ -503,6 +503,7 @@
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#define ICH_HCR_EN (1 << 0)
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#define ICH_HCR_UIE (1 << 1)
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#define ICH_HCR_NPIE (1 << 3)
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#define ICH_HCR_TC (1 << 10)
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#define ICH_HCR_TALL0 (1 << 11)
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#define ICH_HCR_TALL1 (1 << 12)
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@ -84,6 +84,7 @@
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#define GICH_HCR_EN (1 << 0)
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#define GICH_HCR_UIE (1 << 1)
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#define GICH_HCR_NPIE (1 << 3)
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#define GICH_LR_VIRTUALID (0x3ff << 0)
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#define GICH_LR_PHYSID_CPUID_SHIFT (10)
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@ -581,6 +581,7 @@ void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu)
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int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
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{
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struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
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struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
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@ -594,6 +595,9 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
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ptimer->cnt_ctl = 0;
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kvm_timer_update_state(vcpu);
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if (timer->enabled && irqchip_in_kernel(vcpu->kvm))
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kvm_vgic_reset_mapped_irq(vcpu, vtimer->irq.irq);
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return 0;
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}
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@ -767,7 +771,7 @@ int kvm_timer_hyp_init(bool has_gic)
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static_branch_enable(&has_gic_active_state);
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}
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kvm_info("virtual timer IRQ%d\n", host_vtimer_irq);
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kvm_debug("virtual timer IRQ%d\n", host_vtimer_irq);
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cpuhp_setup_state(CPUHP_AP_KVM_ARM_TIMER_STARTING,
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"kvm/arm/timer:starting", kvm_timer_starting_cpu,
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@ -384,14 +384,11 @@ static void vcpu_power_off(struct kvm_vcpu *vcpu)
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int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
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struct kvm_mp_state *mp_state)
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{
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vcpu_load(vcpu);
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if (vcpu->arch.power_off)
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mp_state->mp_state = KVM_MP_STATE_STOPPED;
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else
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mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
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vcpu_put(vcpu);
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return 0;
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}
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@ -400,8 +397,6 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
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{
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int ret = 0;
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vcpu_load(vcpu);
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switch (mp_state->mp_state) {
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case KVM_MP_STATE_RUNNABLE:
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vcpu->arch.power_off = false;
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@ -413,7 +408,6 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
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ret = -EINVAL;
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}
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vcpu_put(vcpu);
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return ret;
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}
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@ -1036,8 +1030,6 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
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struct kvm_device_attr attr;
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long r;
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vcpu_load(vcpu);
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switch (ioctl) {
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case KVM_ARM_VCPU_INIT: {
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struct kvm_vcpu_init init;
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@ -1114,7 +1106,6 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
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r = -EINVAL;
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}
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vcpu_put(vcpu);
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return r;
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}
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@ -215,7 +215,8 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
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* are now visible to the system register interface.
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*/
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if (!cpu_if->vgic_sre) {
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dsb(st);
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dsb(sy);
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isb();
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cpu_if->vgic_vmcr = read_gicreg(ICH_VMCR_EL2);
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}
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@ -1810,8 +1810,8 @@ int kvm_mmu_init(void)
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*/
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BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
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kvm_info("IDMAP page: %lx\n", hyp_idmap_start);
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kvm_info("HYP VA range: %lx:%lx\n",
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kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
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kvm_debug("HYP VA range: %lx:%lx\n",
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kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
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if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
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@ -113,9 +113,12 @@ unsigned long vgic_mmio_read_pending(struct kvm_vcpu *vcpu,
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/* Loop over all IRQs affected by this read */
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for (i = 0; i < len * 8; i++) {
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
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unsigned long flags;
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spin_lock_irqsave(&irq->irq_lock, flags);
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if (irq_is_pending(irq))
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value |= (1U << i);
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spin_unlock_irqrestore(&irq->irq_lock, flags);
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vgic_put_irq(vcpu->kvm, irq);
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}
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@ -37,6 +37,13 @@ void vgic_v2_init_lrs(void)
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vgic_v2_write_lr(i, 0);
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}
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void vgic_v2_set_npie(struct kvm_vcpu *vcpu)
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{
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struct vgic_v2_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v2;
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cpuif->vgic_hcr |= GICH_HCR_NPIE;
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}
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void vgic_v2_set_underflow(struct kvm_vcpu *vcpu)
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{
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struct vgic_v2_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v2;
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@ -64,7 +71,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu)
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int lr;
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unsigned long flags;
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cpuif->vgic_hcr &= ~GICH_HCR_UIE;
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cpuif->vgic_hcr &= ~(GICH_HCR_UIE | GICH_HCR_NPIE);
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for (lr = 0; lr < vgic_cpu->used_lrs; lr++) {
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u32 val = cpuif->vgic_lr[lr];
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@ -410,7 +417,7 @@ int vgic_v2_probe(const struct gic_kvm_info *info)
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kvm_vgic_global_state.type = VGIC_V2;
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kvm_vgic_global_state.max_gic_vcpus = VGIC_V2_MAX_CPUS;
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kvm_info("vgic-v2@%llx\n", info->vctrl.start);
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kvm_debug("vgic-v2@%llx\n", info->vctrl.start);
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return 0;
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out:
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@ -26,6 +26,13 @@ static bool group1_trap;
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static bool common_trap;
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static bool gicv4_enable;
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void vgic_v3_set_npie(struct kvm_vcpu *vcpu)
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{
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struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3;
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cpuif->vgic_hcr |= ICH_HCR_NPIE;
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}
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void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)
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{
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struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3;
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@ -47,7 +54,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu)
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int lr;
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unsigned long flags;
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cpuif->vgic_hcr &= ~ICH_HCR_UIE;
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cpuif->vgic_hcr &= ~(ICH_HCR_UIE | ICH_HCR_NPIE);
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for (lr = 0; lr < vgic_cpu->used_lrs; lr++) {
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u64 val = cpuif->vgic_lr[lr];
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@ -495,6 +495,32 @@ int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,
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return ret;
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}
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/**
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* kvm_vgic_reset_mapped_irq - Reset a mapped IRQ
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* @vcpu: The VCPU pointer
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* @vintid: The INTID of the interrupt
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*
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* Reset the active and pending states of a mapped interrupt. Kernel
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* subsystems injecting mapped interrupts should reset their interrupt lines
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* when we are doing a reset of the VM.
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*/
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void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)
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{
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
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unsigned long flags;
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if (!irq->hw)
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goto out;
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spin_lock_irqsave(&irq->irq_lock, flags);
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irq->active = false;
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irq->pending_latch = false;
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irq->line_level = false;
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spin_unlock_irqrestore(&irq->irq_lock, flags);
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out:
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vgic_put_irq(vcpu->kvm, irq);
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}
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int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid)
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{
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struct vgic_irq *irq;
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@ -684,22 +710,37 @@ static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
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vgic_v3_set_underflow(vcpu);
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}
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static inline void vgic_set_npie(struct kvm_vcpu *vcpu)
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{
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if (kvm_vgic_global_state.type == VGIC_V2)
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vgic_v2_set_npie(vcpu);
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else
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vgic_v3_set_npie(vcpu);
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}
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/* Requires the ap_list_lock to be held. */
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static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
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static int compute_ap_list_depth(struct kvm_vcpu *vcpu,
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bool *multi_sgi)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_irq *irq;
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int count = 0;
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*multi_sgi = false;
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DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
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list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
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spin_lock(&irq->irq_lock);
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/* GICv2 SGIs can count for more than one... */
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if (vgic_irq_is_sgi(irq->intid) && irq->source)
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count += hweight8(irq->source);
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else
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if (vgic_irq_is_sgi(irq->intid) && irq->source) {
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int w = hweight8(irq->source);
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count += w;
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*multi_sgi |= (w > 1);
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} else {
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count++;
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}
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spin_unlock(&irq->irq_lock);
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}
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return count;
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@ -710,28 +751,43 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_irq *irq;
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int count = 0;
|
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int count;
|
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bool npie = false;
|
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bool multi_sgi;
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u8 prio = 0xff;
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|
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DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
|
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|
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if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr)
|
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count = compute_ap_list_depth(vcpu, &multi_sgi);
|
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if (count > kvm_vgic_global_state.nr_lr || multi_sgi)
|
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vgic_sort_ap_list(vcpu);
|
||||
|
||||
count = 0;
|
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|
||||
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
|
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spin_lock(&irq->irq_lock);
|
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|
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if (unlikely(vgic_target_oracle(irq) != vcpu))
|
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goto next;
|
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|
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/*
|
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* If we get an SGI with multiple sources, try to get
|
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* them in all at once.
|
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* If we have multi-SGIs in the pipeline, we need to
|
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* guarantee that they are all seen before any IRQ of
|
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* lower priority. In that case, we need to filter out
|
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* these interrupts by exiting early. This is easy as
|
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* the AP list has been sorted already.
|
||||
*/
|
||||
do {
|
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vgic_populate_lr(vcpu, irq, count++);
|
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} while (irq->source && count < kvm_vgic_global_state.nr_lr);
|
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if (multi_sgi && irq->priority > prio) {
|
||||
spin_unlock(&irq->irq_lock);
|
||||
break;
|
||||
}
|
||||
|
||||
if (likely(vgic_target_oracle(irq) == vcpu)) {
|
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vgic_populate_lr(vcpu, irq, count++);
|
||||
|
||||
if (irq->source) {
|
||||
npie = true;
|
||||
prio = irq->priority;
|
||||
}
|
||||
}
|
||||
|
||||
next:
|
||||
spin_unlock(&irq->irq_lock);
|
||||
|
||||
if (count == kvm_vgic_global_state.nr_lr) {
|
||||
@ -742,6 +798,9 @@ next:
|
||||
}
|
||||
}
|
||||
|
||||
if (npie)
|
||||
vgic_set_npie(vcpu);
|
||||
|
||||
vcpu->arch.vgic_cpu.used_lrs = count;
|
||||
|
||||
/* Nuke remaining LRs */
|
||||
|
@ -96,6 +96,7 @@
|
||||
/* we only support 64 kB translation table page size */
|
||||
#define KVM_ITS_L1E_ADDR_MASK GENMASK_ULL(51, 16)
|
||||
|
||||
/* Requires the irq_lock to be held by the caller. */
|
||||
static inline bool irq_is_pending(struct vgic_irq *irq)
|
||||
{
|
||||
if (irq->config == VGIC_CONFIG_EDGE)
|
||||
@ -159,6 +160,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu);
|
||||
void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr);
|
||||
void vgic_v2_clear_lr(struct kvm_vcpu *vcpu, int lr);
|
||||
void vgic_v2_set_underflow(struct kvm_vcpu *vcpu);
|
||||
void vgic_v2_set_npie(struct kvm_vcpu *vcpu);
|
||||
int vgic_v2_has_attr_regs(struct kvm_device *dev, struct kvm_device_attr *attr);
|
||||
int vgic_v2_dist_uaccess(struct kvm_vcpu *vcpu, bool is_write,
|
||||
int offset, u32 *val);
|
||||
@ -188,6 +190,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu);
|
||||
void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr);
|
||||
void vgic_v3_clear_lr(struct kvm_vcpu *vcpu, int lr);
|
||||
void vgic_v3_set_underflow(struct kvm_vcpu *vcpu);
|
||||
void vgic_v3_set_npie(struct kvm_vcpu *vcpu);
|
||||
void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
|
||||
void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
|
||||
void vgic_v3_enable(struct kvm_vcpu *vcpu);
|
||||
|
Loading…
Reference in New Issue
Block a user