From bb916ebbeabd18f7dc3c661275d2c9d343f4fa85 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Wed, 13 Mar 2013 20:40:00 +0000 Subject: [PATCH] iio: adc: Add dt support for turning on the phy in exynos-adc Without this change the exynos adc controller needed to have its phy enabled in some out-of-driver C code. Add support for specifying the phy enable register by listing it in the reg list. Signed-off-by: Doug Anderson Tested-by: Naveen Krishna Chatradhi Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/arm/samsung/exynos-adc.txt | 4 ++-- drivers/iio/adc/exynos_adc.c | 14 +++++++++++++- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt index f68637861b05..05e9d95ede5c 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt @@ -15,7 +15,7 @@ Required properties: Must be "samsung,exynos-adc-v2" for future controllers. - reg: Contains ADC register address range (base address and - length). + length) and the address of the phy enable register. - interrupts: Contains the interrupt information for the timer. The format is being dependent on which interrupt controller the Samsung device uses. @@ -27,7 +27,7 @@ Example: adding device info in dtsi file adc: adc@12D10000 { compatible = "samsung,exynos-adc-v1"; - reg = <0x12D10000 0x100>; + reg = <0x12D10000 0x100>, <0x10040718 0x4>; interrupts = <0 106 0>; #io-channel-cells = <1>; io-channel-ranges; diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c index 6e968ae48c8a..4a8a9a34228f 100644 --- a/drivers/iio/adc/exynos_adc.c +++ b/drivers/iio/adc/exynos_adc.c @@ -85,6 +85,7 @@ enum adc_version { struct exynos_adc { void __iomem *regs; + void __iomem *enable_reg; struct clk *clk; unsigned int irq; struct regulator *vdd; @@ -269,13 +270,19 @@ static int exynos_adc_probe(struct platform_device *pdev) info = iio_priv(indio_dev); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - info->regs = devm_request_and_ioremap(&pdev->dev, mem); if (!info->regs) { ret = -ENOMEM; goto err_iio; } + mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); + info->enable_reg = devm_request_and_ioremap(&pdev->dev, mem); + if (!info->enable_reg) { + ret = -ENOMEM; + goto err_iio; + } + irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "no irq resource?\n"); @@ -295,6 +302,8 @@ static int exynos_adc_probe(struct platform_device *pdev) goto err_iio; } + writel(1, info->enable_reg); + info->clk = devm_clk_get(&pdev->dev, "adc"); if (IS_ERR(info->clk)) { dev_err(&pdev->dev, "failed getting clock, err = %ld\n", @@ -370,6 +379,7 @@ static int exynos_adc_remove(struct platform_device *pdev) exynos_adc_remove_devices); regulator_disable(info->vdd); clk_disable_unprepare(info->clk); + writel(0, info->enable_reg); iio_device_unregister(indio_dev); free_irq(info->irq, info); iio_device_free(indio_dev); @@ -395,6 +405,7 @@ static int exynos_adc_suspend(struct device *dev) } clk_disable_unprepare(info->clk); + writel(0, info->enable_reg); regulator_disable(info->vdd); return 0; @@ -410,6 +421,7 @@ static int exynos_adc_resume(struct device *dev) if (ret) return ret; + writel(1, info->enable_reg); clk_prepare_enable(info->clk); exynos_adc_hw_init(info);