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alpha: Replace smp_read_barrier_depends() usage with smp_[r]mb()
In preparation for removing smp_read_barrier_depends() altogether, move the Alpha code over to using smp_rmb() and smp_mb() directly. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Paul E. McKenney <paulmck@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
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@ -16,10 +16,10 @@
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/*
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* To ensure dependency ordering is preserved for the _relaxed and
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* _release atomics, an smp_read_barrier_depends() is unconditionally
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* inserted into the _relaxed variants, which are used to build the
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* barriered versions. Avoid redundant back-to-back fences in the
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* _acquire and _fence versions.
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* _release atomics, an smp_mb() is unconditionally inserted into the
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* _relaxed variants, which are used to build the barriered versions.
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* Avoid redundant back-to-back fences in the _acquire and _fence
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* versions.
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*/
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#define __atomic_acquire_fence()
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#define __atomic_post_full_fence()
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@ -70,7 +70,7 @@ static inline int atomic_##op##_return_relaxed(int i, atomic_t *v) \
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".previous" \
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:"=&r" (temp), "=m" (v->counter), "=&r" (result) \
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:"Ir" (i), "m" (v->counter) : "memory"); \
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smp_read_barrier_depends(); \
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smp_mb(); \
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return result; \
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}
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@ -88,7 +88,7 @@ static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v) \
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".previous" \
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:"=&r" (temp), "=m" (v->counter), "=&r" (result) \
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:"Ir" (i), "m" (v->counter) : "memory"); \
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smp_read_barrier_depends(); \
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smp_mb(); \
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return result; \
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}
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@ -123,7 +123,7 @@ static __inline__ s64 atomic64_##op##_return_relaxed(s64 i, atomic64_t * v) \
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".previous" \
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:"=&r" (temp), "=m" (v->counter), "=&r" (result) \
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:"Ir" (i), "m" (v->counter) : "memory"); \
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smp_read_barrier_depends(); \
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smp_mb(); \
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return result; \
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}
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@ -141,7 +141,7 @@ static __inline__ s64 atomic64_fetch_##op##_relaxed(s64 i, atomic64_t * v) \
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".previous" \
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:"=&r" (temp), "=m" (v->counter), "=&r" (result) \
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:"Ir" (i), "m" (v->counter) : "memory"); \
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smp_read_barrier_depends(); \
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smp_mb(); \
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return result; \
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}
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@ -277,9 +277,9 @@ extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= __DIRTY_BITS; retur
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extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= __ACCESS_BITS; return pte; }
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/*
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* The smp_read_barrier_depends() in the following functions are required to
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* order the load of *dir (the pointer in the top level page table) with any
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* subsequent load of the returned pmd_t *ret (ret is data dependent on *dir).
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* The smp_rmb() in the following functions are required to order the load of
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* *dir (the pointer in the top level page table) with any subsequent load of
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* the returned pmd_t *ret (ret is data dependent on *dir).
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*
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* If this ordering is not enforced, the CPU might load an older value of
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* *ret, which may be uninitialized data. See mm/memory.c:__pte_alloc for
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@ -293,7 +293,7 @@ extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= __ACCESS_BITS; retu
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extern inline pmd_t * pmd_offset(pud_t * dir, unsigned long address)
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{
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pmd_t *ret = (pmd_t *) pud_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1));
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smp_read_barrier_depends(); /* see above */
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smp_rmb(); /* see above */
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return ret;
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}
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#define pmd_offset pmd_offset
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@ -303,7 +303,7 @@ extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address)
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{
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pte_t *ret = (pte_t *) pmd_page_vaddr(*dir)
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+ ((address >> PAGE_SHIFT) & (PTRS_PER_PAGE - 1));
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smp_read_barrier_depends(); /* see above */
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smp_rmb(); /* see above */
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return ret;
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}
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#define pte_offset_kernel pte_offset_kernel
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@ -437,7 +437,7 @@ int __pte_alloc(struct mm_struct *mm, pmd_t *pmd)
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* of a chain of data-dependent loads, meaning most CPUs (alpha
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* being the notable exception) will already guarantee loads are
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* seen in-order. See the alpha page table accessors for the
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* smp_read_barrier_depends() barriers in page table walking code.
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* smp_rmb() barriers in page table walking code.
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*/
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smp_wmb(); /* Could be smp_wmb__xxx(before|after)_spin_lock */
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