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[SCSI] gvp11: Reindentation
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
This commit is contained in:
Geert Uytterhoeven
James Bottomley
parent
09bc85b08c
commit
bb17b7871b
@ -19,331 +19,335 @@
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#include "wd33c93.h"
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#include "gvp11.h"
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#include<linux/stat.h>
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#include <linux/stat.h>
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#define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base))
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#define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata))
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static irqreturn_t gvp11_intr (int irq, void *_instance)
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#define DMA(ptr) ((gvp11_scsiregs *)((ptr)->base))
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#define HDATA(ptr) ((struct WD33C93_hostdata *)((ptr)->hostdata))
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static irqreturn_t gvp11_intr(int irq, void *_instance)
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{
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unsigned long flags;
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unsigned int status;
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struct Scsi_Host *instance = (struct Scsi_Host *)_instance;
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unsigned long flags;
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unsigned int status;
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struct Scsi_Host *instance = (struct Scsi_Host *)_instance;
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status = DMA(instance)->CNTR;
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if (!(status & GVP11_DMAC_INT_PENDING))
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return IRQ_NONE;
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status = DMA(instance)->CNTR;
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if (!(status & GVP11_DMAC_INT_PENDING))
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return IRQ_NONE;
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spin_lock_irqsave(instance->host_lock, flags);
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wd33c93_intr(instance);
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spin_unlock_irqrestore(instance->host_lock, flags);
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return IRQ_HANDLED;
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spin_lock_irqsave(instance->host_lock, flags);
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wd33c93_intr(instance);
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spin_unlock_irqrestore(instance->host_lock, flags);
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return IRQ_HANDLED;
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}
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static int gvp11_xfer_mask = 0;
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void gvp11_setup (char *str, int *ints)
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void gvp11_setup(char *str, int *ints)
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{
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gvp11_xfer_mask = ints[1];
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gvp11_xfer_mask = ints[1];
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}
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static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
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{
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unsigned short cntr = GVP11_DMAC_INT_ENABLE;
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unsigned long addr = virt_to_bus(cmd->SCp.ptr);
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int bank_mask;
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static int scsi_alloc_out_of_range = 0;
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/* use bounce buffer if the physical address is bad */
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if (addr & HDATA(cmd->device->host)->dma_xfer_mask)
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{
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HDATA(cmd->device->host)->dma_bounce_len = (cmd->SCp.this_residual + 511)
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& ~0x1ff;
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if( !scsi_alloc_out_of_range ) {
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HDATA(cmd->device->host)->dma_bounce_buffer =
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kmalloc (HDATA(cmd->device->host)->dma_bounce_len, GFP_KERNEL);
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HDATA(cmd->device->host)->dma_buffer_pool = BUF_SCSI_ALLOCED;
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}
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if (scsi_alloc_out_of_range ||
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!HDATA(cmd->device->host)->dma_bounce_buffer) {
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HDATA(cmd->device->host)->dma_bounce_buffer =
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amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
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"GVP II SCSI Bounce Buffer");
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if(!HDATA(cmd->device->host)->dma_bounce_buffer)
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{
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HDATA(cmd->device->host)->dma_bounce_len = 0;
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return 1;
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}
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HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED;
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}
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/* check if the address of the bounce buffer is OK */
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addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
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unsigned short cntr = GVP11_DMAC_INT_ENABLE;
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unsigned long addr = virt_to_bus(cmd->SCp.ptr);
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int bank_mask;
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static int scsi_alloc_out_of_range = 0;
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/* use bounce buffer if the physical address is bad */
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if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
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/* fall back to Chip RAM if address out of range */
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if( HDATA(cmd->device->host)->dma_buffer_pool == BUF_SCSI_ALLOCED) {
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kfree (HDATA(cmd->device->host)->dma_bounce_buffer);
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scsi_alloc_out_of_range = 1;
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} else {
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amiga_chip_free (HDATA(cmd->device->host)->dma_bounce_buffer);
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}
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HDATA(cmd->device->host)->dma_bounce_buffer =
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amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
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"GVP II SCSI Bounce Buffer");
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HDATA(cmd->device->host)->dma_bounce_len =
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(cmd->SCp.this_residual + 511) & ~0x1ff;
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if(!HDATA(cmd->device->host)->dma_bounce_buffer)
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{
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HDATA(cmd->device->host)->dma_bounce_len = 0;
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return 1;
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}
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if (!scsi_alloc_out_of_range) {
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HDATA(cmd->device->host)->dma_bounce_buffer =
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kmalloc(HDATA(cmd->device->host)->dma_bounce_len,
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GFP_KERNEL);
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HDATA(cmd->device->host)->dma_buffer_pool =
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BUF_SCSI_ALLOCED;
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}
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addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
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HDATA(cmd->device->host)->dma_buffer_pool = BUF_CHIP_ALLOCED;
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if (scsi_alloc_out_of_range ||
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!HDATA(cmd->device->host)->dma_bounce_buffer) {
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HDATA(cmd->device->host)->dma_bounce_buffer =
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amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
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"GVP II SCSI Bounce Buffer");
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if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
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HDATA(cmd->device->host)->dma_bounce_len = 0;
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return 1;
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}
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HDATA(cmd->device->host)->dma_buffer_pool =
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BUF_CHIP_ALLOCED;
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}
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/* check if the address of the bounce buffer is OK */
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addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
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if (addr & HDATA(cmd->device->host)->dma_xfer_mask) {
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/* fall back to Chip RAM if address out of range */
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if (HDATA(cmd->device->host)->dma_buffer_pool ==
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BUF_SCSI_ALLOCED) {
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kfree(HDATA(cmd->device->host)->dma_bounce_buffer);
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scsi_alloc_out_of_range = 1;
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} else {
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amiga_chip_free(HDATA(cmd->device->host)->dma_bounce_buffer);
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}
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HDATA(cmd->device->host)->dma_bounce_buffer =
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amiga_chip_alloc(HDATA(cmd->device->host)->dma_bounce_len,
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"GVP II SCSI Bounce Buffer");
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if (!HDATA(cmd->device->host)->dma_bounce_buffer) {
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HDATA(cmd->device->host)->dma_bounce_len = 0;
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return 1;
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}
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addr = virt_to_bus(HDATA(cmd->device->host)->dma_bounce_buffer);
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HDATA(cmd->device->host)->dma_buffer_pool =
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BUF_CHIP_ALLOCED;
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}
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if (!dir_in) {
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/* copy to bounce buffer for a write */
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memcpy(HDATA(cmd->device->host)->dma_bounce_buffer,
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cmd->SCp.ptr, cmd->SCp.this_residual);
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}
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}
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if (!dir_in) {
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/* copy to bounce buffer for a write */
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memcpy (HDATA(cmd->device->host)->dma_bounce_buffer,
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cmd->SCp.ptr, cmd->SCp.this_residual);
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/* setup dma direction */
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if (!dir_in)
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cntr |= GVP11_DMAC_DIR_WRITE;
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HDATA(cmd->device->host)->dma_dir = dir_in;
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DMA(cmd->device->host)->CNTR = cntr;
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/* setup DMA *physical* address */
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DMA(cmd->device->host)->ACR = addr;
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if (dir_in) {
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/* invalidate any cache */
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cache_clear(addr, cmd->SCp.this_residual);
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} else {
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/* push any dirty cache */
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cache_push(addr, cmd->SCp.this_residual);
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}
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}
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/* setup dma direction */
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if (!dir_in)
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cntr |= GVP11_DMAC_DIR_WRITE;
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if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0))
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DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18);
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HDATA(cmd->device->host)->dma_dir = dir_in;
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DMA(cmd->device->host)->CNTR = cntr;
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/* start DMA */
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DMA(cmd->device->host)->ST_DMA = 1;
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/* setup DMA *physical* address */
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DMA(cmd->device->host)->ACR = addr;
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if (dir_in)
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/* invalidate any cache */
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cache_clear (addr, cmd->SCp.this_residual);
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else
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/* push any dirty cache */
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cache_push (addr, cmd->SCp.this_residual);
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if ((bank_mask = (~HDATA(cmd->device->host)->dma_xfer_mask >> 18) & 0x01c0))
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DMA(cmd->device->host)->BANK = bank_mask & (addr >> 18);
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/* start DMA */
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DMA(cmd->device->host)->ST_DMA = 1;
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/* return success */
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return 0;
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/* return success */
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return 0;
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}
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static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
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int status)
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{
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/* stop DMA */
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DMA(instance)->SP_DMA = 1;
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/* remove write bit from CONTROL bits */
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DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
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/* stop DMA */
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DMA(instance)->SP_DMA = 1;
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/* remove write bit from CONTROL bits */
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DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
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/* copy from a bounce buffer, if necessary */
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if (status && HDATA(instance)->dma_bounce_buffer) {
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if (HDATA(instance)->dma_dir && SCpnt)
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memcpy (SCpnt->SCp.ptr,
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HDATA(instance)->dma_bounce_buffer,
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SCpnt->SCp.this_residual);
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if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED)
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kfree (HDATA(instance)->dma_bounce_buffer);
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else
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amiga_chip_free(HDATA(instance)->dma_bounce_buffer);
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HDATA(instance)->dma_bounce_buffer = NULL;
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HDATA(instance)->dma_bounce_len = 0;
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}
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/* copy from a bounce buffer, if necessary */
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if (status && HDATA(instance)->dma_bounce_buffer) {
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if (HDATA(instance)->dma_dir && SCpnt)
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memcpy(SCpnt->SCp.ptr,
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HDATA(instance)->dma_bounce_buffer,
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SCpnt->SCp.this_residual);
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if (HDATA(instance)->dma_buffer_pool == BUF_SCSI_ALLOCED)
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kfree(HDATA(instance)->dma_bounce_buffer);
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else
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amiga_chip_free(HDATA(instance)->dma_bounce_buffer);
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HDATA(instance)->dma_bounce_buffer = NULL;
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HDATA(instance)->dma_bounce_len = 0;
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}
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}
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#define CHECK_WD33C93
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int __init gvp11_detect(struct scsi_host_template *tpnt)
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{
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static unsigned char called = 0;
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struct Scsi_Host *instance;
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unsigned long address;
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unsigned int epc;
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struct zorro_dev *z = NULL;
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unsigned int default_dma_xfer_mask;
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wd33c93_regs regs;
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int num_gvp11 = 0;
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static unsigned char called = 0;
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struct Scsi_Host *instance;
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unsigned long address;
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unsigned int epc;
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struct zorro_dev *z = NULL;
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unsigned int default_dma_xfer_mask;
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wd33c93_regs regs;
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int num_gvp11 = 0;
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#ifdef CHECK_WD33C93
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volatile unsigned char *sasr_3393, *scmd_3393;
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unsigned char save_sasr;
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unsigned char q, qq;
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volatile unsigned char *sasr_3393, *scmd_3393;
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unsigned char save_sasr;
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unsigned char q, qq;
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#endif
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if (!MACH_IS_AMIGA || called)
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return 0;
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called = 1;
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if (!MACH_IS_AMIGA || called)
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return 0;
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called = 1;
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tpnt->proc_name = "GVP11";
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tpnt->proc_info = &wd33c93_proc_info;
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tpnt->proc_name = "GVP11";
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tpnt->proc_info = &wd33c93_proc_info;
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while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
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/*
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* This should (hopefully) be the correct way to identify
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* all the different GVP SCSI controllers (except for the
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* SERIES I though).
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*/
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while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
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/*
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* This should (hopefully) be the correct way to identify
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* all the different GVP SCSI controllers (except for the
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* SERIES I though).
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*/
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if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI ||
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z->id == ZORRO_PROD_GVP_SERIES_II)
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default_dma_xfer_mask = ~0x00ffffff;
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else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI ||
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z->id == ZORRO_PROD_GVP_A530_SCSI ||
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z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
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default_dma_xfer_mask = ~0x01ffffff;
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else if (z->id == ZORRO_PROD_GVP_A1291 ||
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z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
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default_dma_xfer_mask = ~0x07ffffff;
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else
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continue;
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if (z->id == ZORRO_PROD_GVP_COMBO_030_R3_SCSI ||
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z->id == ZORRO_PROD_GVP_SERIES_II)
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default_dma_xfer_mask = ~0x00ffffff;
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else if (z->id == ZORRO_PROD_GVP_GFORCE_030_SCSI ||
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z->id == ZORRO_PROD_GVP_A530_SCSI ||
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z->id == ZORRO_PROD_GVP_COMBO_030_R4_SCSI)
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default_dma_xfer_mask = ~0x01ffffff;
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else if (z->id == ZORRO_PROD_GVP_A1291 ||
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z->id == ZORRO_PROD_GVP_GFORCE_040_SCSI_1)
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default_dma_xfer_mask = ~0x07ffffff;
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else
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continue;
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/*
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* Rumors state that some GVP ram boards use the same product
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* code as the SCSI controllers. Therefore if the board-size
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* is not 64KB we asume it is a ram board and bail out.
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*/
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if (z->resource.end-z->resource.start != 0xffff)
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/*
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* Rumors state that some GVP ram boards use the same product
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* code as the SCSI controllers. Therefore if the board-size
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* is not 64KB we asume it is a ram board and bail out.
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*/
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if (z->resource.end - z->resource.start != 0xffff)
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continue;
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address = z->resource.start;
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if (!request_mem_region(address, 256, "wd33c93"))
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continue;
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#ifdef CHECK_WD33C93
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/*
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* These darn GVP boards are a problem - it can be tough to tell
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* whether or not they include a SCSI controller. This is the
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* ultimate Yet-Another-GVP-Detection-Hack in that it actually
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* probes for a WD33c93 chip: If we find one, it's extremely
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* likely that this card supports SCSI, regardless of Product_
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* Code, Board_Size, etc.
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*/
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/* Get pointers to the presumed register locations and save contents */
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sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
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scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
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save_sasr = *sasr_3393;
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/* First test the AuxStatus Reg */
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q = *sasr_3393; /* read it */
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if (q & 0x08) /* bit 3 should always be clear */
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goto release;
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*sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */
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if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
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*sasr_3393 = save_sasr; /* Oops - restore this byte */
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goto release;
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}
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if (*sasr_3393 != q) { /* should still read the same */
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*sasr_3393 = save_sasr; /* Oops - restore this byte */
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goto release;
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}
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if (*scmd_3393 != q) /* and so should the image at 0x1f */
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goto release;
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/*
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* Ok, we probably have a wd33c93, but let's check a few other places
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* for good measure. Make sure that this works for both 'A and 'B
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* chip versions.
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*/
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*sasr_3393 = WD_SCSI_STATUS;
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q = *scmd_3393;
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*sasr_3393 = WD_SCSI_STATUS;
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*scmd_3393 = ~q;
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*sasr_3393 = WD_SCSI_STATUS;
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qq = *scmd_3393;
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*sasr_3393 = WD_SCSI_STATUS;
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*scmd_3393 = q;
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if (qq != q) /* should be read only */
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goto release;
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*sasr_3393 = 0x1e; /* this register is unimplemented */
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q = *scmd_3393;
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*sasr_3393 = 0x1e;
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*scmd_3393 = ~q;
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*sasr_3393 = 0x1e;
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qq = *scmd_3393;
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*sasr_3393 = 0x1e;
|
||||
*scmd_3393 = q;
|
||||
if (qq != q || qq != 0xff) /* should be read only, all 1's */
|
||||
goto release;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
q = *scmd_3393;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
*scmd_3393 = ~q;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
qq = *scmd_3393;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
*scmd_3393 = q;
|
||||
if (qq != (~q & 0xff)) /* should be read/write */
|
||||
goto release;
|
||||
#endif
|
||||
|
||||
instance = scsi_register(tpnt, sizeof(struct WD33C93_hostdata));
|
||||
if (instance == NULL)
|
||||
goto release;
|
||||
instance->base = ZTWO_VADDR(address);
|
||||
instance->irq = IRQ_AMIGA_PORTS;
|
||||
instance->unique_id = z->slotaddr;
|
||||
|
||||
if (gvp11_xfer_mask)
|
||||
HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask;
|
||||
else
|
||||
HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask;
|
||||
|
||||
DMA(instance)->secret2 = 1;
|
||||
DMA(instance)->secret1 = 0;
|
||||
DMA(instance)->secret3 = 15;
|
||||
while (DMA(instance)->CNTR & GVP11_DMAC_BUSY)
|
||||
;
|
||||
DMA(instance)->CNTR = 0;
|
||||
|
||||
DMA(instance)->BANK = 0;
|
||||
|
||||
epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
|
||||
|
||||
/*
|
||||
* Check for 14MHz SCSI clock
|
||||
*/
|
||||
regs.SASR = &(DMA(instance)->SASR);
|
||||
regs.SCMD = &(DMA(instance)->SCMD);
|
||||
HDATA(instance)->no_sync = 0xff;
|
||||
HDATA(instance)->fast = 0;
|
||||
HDATA(instance)->dma_mode = CTRL_DMA;
|
||||
wd33c93_init(instance, regs, dma_setup, dma_stop,
|
||||
(epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
|
||||
: WD33C93_FS_12_15);
|
||||
|
||||
if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
|
||||
"GVP11 SCSI", instance))
|
||||
goto unregister;
|
||||
DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
|
||||
num_gvp11++;
|
||||
continue;
|
||||
|
||||
address = z->resource.start;
|
||||
if (!request_mem_region(address, 256, "wd33c93"))
|
||||
continue;
|
||||
|
||||
#ifdef CHECK_WD33C93
|
||||
|
||||
/*
|
||||
* These darn GVP boards are a problem - it can be tough to tell
|
||||
* whether or not they include a SCSI controller. This is the
|
||||
* ultimate Yet-Another-GVP-Detection-Hack in that it actually
|
||||
* probes for a WD33c93 chip: If we find one, it's extremely
|
||||
* likely that this card supports SCSI, regardless of Product_
|
||||
* Code, Board_Size, etc.
|
||||
*/
|
||||
|
||||
/* Get pointers to the presumed register locations and save contents */
|
||||
|
||||
sasr_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SASR);
|
||||
scmd_3393 = &(((gvp11_scsiregs *)(ZTWO_VADDR(address)))->SCMD);
|
||||
save_sasr = *sasr_3393;
|
||||
|
||||
/* First test the AuxStatus Reg */
|
||||
|
||||
q = *sasr_3393; /* read it */
|
||||
if (q & 0x08) /* bit 3 should always be clear */
|
||||
goto release;
|
||||
*sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */
|
||||
if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
|
||||
*sasr_3393 = save_sasr; /* Oops - restore this byte */
|
||||
goto release;
|
||||
}
|
||||
if (*sasr_3393 != q) { /* should still read the same */
|
||||
*sasr_3393 = save_sasr; /* Oops - restore this byte */
|
||||
goto release;
|
||||
}
|
||||
if (*scmd_3393 != q) /* and so should the image at 0x1f */
|
||||
goto release;
|
||||
|
||||
|
||||
/* Ok, we probably have a wd33c93, but let's check a few other places
|
||||
* for good measure. Make sure that this works for both 'A and 'B
|
||||
* chip versions.
|
||||
*/
|
||||
|
||||
*sasr_3393 = WD_SCSI_STATUS;
|
||||
q = *scmd_3393;
|
||||
*sasr_3393 = WD_SCSI_STATUS;
|
||||
*scmd_3393 = ~q;
|
||||
*sasr_3393 = WD_SCSI_STATUS;
|
||||
qq = *scmd_3393;
|
||||
*sasr_3393 = WD_SCSI_STATUS;
|
||||
*scmd_3393 = q;
|
||||
if (qq != q) /* should be read only */
|
||||
goto release;
|
||||
*sasr_3393 = 0x1e; /* this register is unimplemented */
|
||||
q = *scmd_3393;
|
||||
*sasr_3393 = 0x1e;
|
||||
*scmd_3393 = ~q;
|
||||
*sasr_3393 = 0x1e;
|
||||
qq = *scmd_3393;
|
||||
*sasr_3393 = 0x1e;
|
||||
*scmd_3393 = q;
|
||||
if (qq != q || qq != 0xff) /* should be read only, all 1's */
|
||||
goto release;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
q = *scmd_3393;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
*scmd_3393 = ~q;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
qq = *scmd_3393;
|
||||
*sasr_3393 = WD_TIMEOUT_PERIOD;
|
||||
*scmd_3393 = q;
|
||||
if (qq != (~q & 0xff)) /* should be read/write */
|
||||
goto release;
|
||||
#endif
|
||||
|
||||
instance = scsi_register (tpnt, sizeof (struct WD33C93_hostdata));
|
||||
if(instance == NULL)
|
||||
goto release;
|
||||
instance->base = ZTWO_VADDR(address);
|
||||
instance->irq = IRQ_AMIGA_PORTS;
|
||||
instance->unique_id = z->slotaddr;
|
||||
|
||||
if (gvp11_xfer_mask)
|
||||
HDATA(instance)->dma_xfer_mask = gvp11_xfer_mask;
|
||||
else
|
||||
HDATA(instance)->dma_xfer_mask = default_dma_xfer_mask;
|
||||
|
||||
|
||||
DMA(instance)->secret2 = 1;
|
||||
DMA(instance)->secret1 = 0;
|
||||
DMA(instance)->secret3 = 15;
|
||||
while (DMA(instance)->CNTR & GVP11_DMAC_BUSY) ;
|
||||
DMA(instance)->CNTR = 0;
|
||||
|
||||
DMA(instance)->BANK = 0;
|
||||
|
||||
epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
|
||||
|
||||
/*
|
||||
* Check for 14MHz SCSI clock
|
||||
*/
|
||||
regs.SASR = &(DMA(instance)->SASR);
|
||||
regs.SCMD = &(DMA(instance)->SCMD);
|
||||
HDATA(instance)->no_sync = 0xff;
|
||||
HDATA(instance)->fast = 0;
|
||||
HDATA(instance)->dma_mode = CTRL_DMA;
|
||||
wd33c93_init(instance, regs, dma_setup, dma_stop,
|
||||
(epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
|
||||
: WD33C93_FS_12_15);
|
||||
|
||||
if (request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED, "GVP11 SCSI",
|
||||
instance))
|
||||
goto unregister;
|
||||
DMA(instance)->CNTR = GVP11_DMAC_INT_ENABLE;
|
||||
num_gvp11++;
|
||||
continue;
|
||||
|
||||
unregister:
|
||||
scsi_unregister(instance);
|
||||
scsi_unregister(instance);
|
||||
release:
|
||||
release_mem_region(address, 256);
|
||||
}
|
||||
release_mem_region(address, 256);
|
||||
}
|
||||
|
||||
return num_gvp11;
|
||||
return num_gvp11;
|
||||
}
|
||||
|
||||
static int gvp11_bus_reset(struct scsi_cmnd *cmd)
|
||||
@ -388,11 +392,11 @@ static struct scsi_host_template driver_template = {
|
||||
int gvp11_release(struct Scsi_Host *instance)
|
||||
{
|
||||
#ifdef MODULE
|
||||
DMA(instance)->CNTR = 0;
|
||||
release_mem_region(ZTWO_PADDR(instance->base), 256);
|
||||
free_irq(IRQ_AMIGA_PORTS, instance);
|
||||
DMA(instance)->CNTR = 0;
|
||||
release_mem_region(ZTWO_PADDR(instance->base), 256);
|
||||
free_irq(IRQ_AMIGA_PORTS, instance);
|
||||
#endif
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
@ -15,11 +15,11 @@ int gvp11_detect(struct scsi_host_template *);
|
||||
int gvp11_release(struct Scsi_Host *);
|
||||
|
||||
#ifndef CMD_PER_LUN
|
||||
#define CMD_PER_LUN 2
|
||||
#define CMD_PER_LUN 2
|
||||
#endif
|
||||
|
||||
#ifndef CAN_QUEUE
|
||||
#define CAN_QUEUE 16
|
||||
#define CAN_QUEUE 16
|
||||
#endif
|
||||
|
||||
#ifndef HOSTS_C
|
||||
@ -28,24 +28,24 @@ int gvp11_release(struct Scsi_Host *);
|
||||
* if the transfer address ANDed with this results in a non-zero
|
||||
* result, then we can't use DMA.
|
||||
*/
|
||||
#define GVP11_XFER_MASK (0xff000001)
|
||||
#define GVP11_XFER_MASK (0xff000001)
|
||||
|
||||
typedef struct {
|
||||
unsigned char pad1[64];
|
||||
volatile unsigned short CNTR;
|
||||
unsigned char pad2[31];
|
||||
volatile unsigned char SASR;
|
||||
unsigned char pad3;
|
||||
volatile unsigned char SCMD;
|
||||
unsigned char pad4[4];
|
||||
volatile unsigned short BANK;
|
||||
unsigned char pad5[6];
|
||||
volatile unsigned long ACR;
|
||||
volatile unsigned short secret1; /* store 0 here */
|
||||
volatile unsigned short ST_DMA;
|
||||
volatile unsigned short SP_DMA;
|
||||
volatile unsigned short secret2; /* store 1 here */
|
||||
volatile unsigned short secret3; /* store 15 here */
|
||||
unsigned char pad1[64];
|
||||
volatile unsigned short CNTR;
|
||||
unsigned char pad2[31];
|
||||
volatile unsigned char SASR;
|
||||
unsigned char pad3;
|
||||
volatile unsigned char SCMD;
|
||||
unsigned char pad4[4];
|
||||
volatile unsigned short BANK;
|
||||
unsigned char pad5[6];
|
||||
volatile unsigned long ACR;
|
||||
volatile unsigned short secret1; /* store 0 here */
|
||||
volatile unsigned short ST_DMA;
|
||||
volatile unsigned short SP_DMA;
|
||||
volatile unsigned short secret2; /* store 1 here */
|
||||
volatile unsigned short secret3; /* store 15 here */
|
||||
} gvp11_scsiregs;
|
||||
|
||||
/* bits in CNTR */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user