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[PATCH] i386: add Intel Core related PMU MSRs
- add Intel Precise-Event Based sampling (PEBS) related MSR - add Intel Data Save (DS) Area related MSR - add Intel Core microarchitecure performance counter MSRs Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
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@ -141,6 +141,10 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
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#define MSR_IA32_MC0_ADDR 0x402
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#define MSR_IA32_MC0_MISC 0x403
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#define MSR_IA32_PEBS_ENABLE 0x3f1
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#define MSR_IA32_DS_AREA 0x600
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#define MSR_IA32_PERF_CAPABILITIES 0x345
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/* Pentium IV performance counter MSRs */
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#define MSR_P4_BPU_PERFCTR0 0x300
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#define MSR_P4_BPU_PERFCTR1 0x301
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@ -284,4 +288,13 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
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#define MSR_TMTA_LRTI_READOUT 0x80868018
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#define MSR_TMTA_LRTI_VOLT_MHZ 0x8086801a
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/* Intel Core-based CPU performance counters */
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#define MSR_CORE_PERF_FIXED_CTR0 0x309
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#define MSR_CORE_PERF_FIXED_CTR1 0x30a
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#define MSR_CORE_PERF_FIXED_CTR2 0x30b
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#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x38d
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#define MSR_CORE_PERF_GLOBAL_STATUS 0x38e
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#define MSR_CORE_PERF_GLOBAL_CTRL 0x38f
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#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x390
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#endif /* __ASM_MSR_H */
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