spi: omap2-mcspi: Fix DMA and FIFO event trigger size mismatch

Commit b682cffa3a ("spi: omap2-mcspi: Set FIFO DMA trigger level to word length")
broke SPI transfers where bits_per_word != 8. This is because of
mimsatch between McSPI FIFO level event trigger size (SPI word length) and
DMA request size(word length * maxburst). This leads to data
corruption, lockup and errors like:

	spi1.0: EOW timed out

Fix this by setting DMA maxburst size to 1 so that
McSPI FIFO level event trigger size matches DMA request size.

Fixes: b682cffa3a ("spi: omap2-mcspi: Set FIFO DMA trigger level to word length")
Cc: stable@vger.kernel.org
Reported-by: David Lechner <david@lechnology.com>
Tested-by: David Lechner <david@lechnology.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Vignesh R 2019-01-15 12:28:32 +05:30 committed by Mark Brown
parent aa54c1c9d9
commit baf8b9f8d2
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0

View File

@ -623,8 +623,8 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
cfg.dst_addr = cs->phys + OMAP2_MCSPI_TX0;
cfg.src_addr_width = width;
cfg.dst_addr_width = width;
cfg.src_maxburst = es;
cfg.dst_maxburst = es;
cfg.src_maxburst = 1;
cfg.dst_maxburst = 1;
rx = xfer->rx_buf;
tx = xfer->tx_buf;