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x86: apic - use pr_ macros for logging

Browse Source 
Impact: cleanup

It saves us some source lines and shift the code a bit righter.

And a multiline comment style is fixed too :-)

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Acked-by: "Maciej W. Rozycki" <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Cyrill Gorcunov 2008-11-10 09:16:41 +01:00 committed by Ingo Molnar
parent 4e0304310f
commit ba21ebb6ab
1 changed files with 53 additions and 63 deletions
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116
arch/x86/kernel/apic.c
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@ -559,13 +559,13 @@ static int __init calibrate_by_pmtimer(long deltapm, long *delta)
} else { } else {
res = (((u64)deltapm) * mult) >> 22; res = (((u64)deltapm) * mult) >> 22;
do_div(res, 1000000); do_div(res, 1000000);
printk(KERN_WARNING "APIC calibration not consistent " pr_warning("APIC calibration not consistent "
"with PM Timer: %ldms instead of 100ms\n", "with PM Timer: %ldms instead of 100ms\n",
(long)res); (long)res);
/* Correct the lapic counter value */ /* Correct the lapic counter value */
res = (((u64)(*delta)) * pm_100ms); res = (((u64)(*delta)) * pm_100ms);
do_div(res, deltapm); do_div(res, deltapm);
printk(KERN_INFO "APIC delta adjusted to PM-Timer: " pr_info("APIC delta adjusted to PM-Timer: "
"%lu (%ld)\n", (unsigned long)res, *delta); "%lu (%ld)\n", (unsigned long)res, *delta);
*delta = (long)res; *delta = (long)res;
} }
@ -645,8 +645,7 @@ static int __init calibrate_APIC_clock(void)
*/ */
if (calibration_result < (1000000 / HZ)) { if (calibration_result < (1000000 / HZ)) {
local_irq_enable(); local_irq_enable();
printk(KERN_WARNING pr_warning("APIC frequency too slow, disabling apic timer\n");
"APIC frequency too slow, disabling apic timer\n");
return -1; return -1;
} }
@ -688,8 +687,7 @@ static int __init calibrate_APIC_clock(void)
local_irq_enable(); local_irq_enable();
if (levt->features & CLOCK_EVT_FEAT_DUMMY) { if (levt->features & CLOCK_EVT_FEAT_DUMMY) {
printk(KERN_WARNING pr_warning("APIC timer disabled due to verification failure.\n");
"APIC timer disabled due to verification failure.\n");
return -1; return -1;
} }
@ -710,7 +708,7 @@ void __init setup_boot_APIC_clock(void)
* broadcast mechanism is used. On UP systems simply ignore it. * broadcast mechanism is used. On UP systems simply ignore it.
*/ */
if (disable_apic_timer) { if (disable_apic_timer) {
printk(KERN_INFO "Disabling APIC timer\n"); pr_info("Disabling APIC timer\n");
/* No broadcast on UP ! */ /* No broadcast on UP ! */
if (num_possible_cpus() > 1) { if (num_possible_cpus() > 1) {
lapic_clockevent.mult = 1; lapic_clockevent.mult = 1;
@ -737,7 +735,7 @@ void __init setup_boot_APIC_clock(void)
if (nmi_watchdog != NMI_IO_APIC) if (nmi_watchdog != NMI_IO_APIC)
lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY;
else else
printk(KERN_WARNING "APIC timer registered as dummy," pr_warning("APIC timer registered as dummy,"
" due to nmi_watchdog=%d!\n", nmi_watchdog); " due to nmi_watchdog=%d!\n", nmi_watchdog);
/* Setup the lapic or request the broadcast */ /* Setup the lapic or request the broadcast */
@ -769,8 +767,7 @@ static void local_apic_timer_interrupt(void)
* spurious. * spurious.
*/ */
if (!evt->event_handler) { if (!evt->event_handler) {
printk(KERN_WARNING pr_warning("Spurious LAPIC timer interrupt on cpu %d\n", cpu);
"Spurious LAPIC timer interrupt on cpu %d\n", cpu);
/* Switch it off */ /* Switch it off */
lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt); lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, evt);
return; return;
@ -1089,7 +1086,7 @@ static void __cpuinit lapic_setup_esr(void)
unsigned int oldvalue, value, maxlvt; unsigned int oldvalue, value, maxlvt;
if (!lapic_is_integrated()) { if (!lapic_is_integrated()) {
printk(KERN_INFO "No ESR for 82489DX.\n"); pr_info("No ESR for 82489DX.\n");
return; return;
} }
@ -1100,7 +1097,7 @@ static void __cpuinit lapic_setup_esr(void)
* ESR disabled - we can't do anything useful with the * ESR disabled - we can't do anything useful with the
* errors anyway - mbligh * errors anyway - mbligh
*/ */
printk(KERN_INFO "Leaving ESR disabled.\n"); pr_info("Leaving ESR disabled.\n");
return; return;
} }
@ -1294,7 +1291,7 @@ void check_x2apic(void)
rdmsr(MSR_IA32_APICBASE, msr, msr2); rdmsr(MSR_IA32_APICBASE, msr, msr2);
if (msr & X2APIC_ENABLE) { if (msr & X2APIC_ENABLE) {
printk("x2apic enabled by BIOS, switching to x2apic ops\n"); pr_info("x2apic enabled by BIOS, switching to x2apic ops\n");
x2apic_preenabled = x2apic = 1; x2apic_preenabled = x2apic = 1;
apic_ops = &x2apic_ops; apic_ops = &x2apic_ops;
} }
@ -1306,7 +1303,7 @@ void enable_x2apic(void)
rdmsr(MSR_IA32_APICBASE, msr, msr2); rdmsr(MSR_IA32_APICBASE, msr, msr2);
if (!(msr & X2APIC_ENABLE)) { if (!(msr & X2APIC_ENABLE)) {
printk("Enabling x2apic\n"); pr_info("Enabling x2apic\n");
wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0);
} }
} }
@ -1321,9 +1318,8 @@ void enable_IR_x2apic(void)
return; return;
if (!x2apic_preenabled && disable_x2apic) { if (!x2apic_preenabled && disable_x2apic) {
printk(KERN_INFO pr_info("Skipped enabling x2apic and Interrupt-remapping "
"Skipped enabling x2apic and Interrupt-remapping " "because of nox2apic\n");
"because of nox2apic\n");
return; return;
} }
@ -1331,22 +1327,19 @@ void enable_IR_x2apic(void)
panic("Bios already enabled x2apic, can't enforce nox2apic"); panic("Bios already enabled x2apic, can't enforce nox2apic");
if (!x2apic_preenabled && skip_ioapic_setup) { if (!x2apic_preenabled && skip_ioapic_setup) {
printk(KERN_INFO pr_info("Skipped enabling x2apic and Interrupt-remapping "
"Skipped enabling x2apic and Interrupt-remapping " "because of skipping io-apic setup\n");
"because of skipping io-apic setup\n");
return; return;
} }
ret = dmar_table_init(); ret = dmar_table_init();
if (ret) { if (ret) {
printk(KERN_INFO pr_info("dmar_table_init() failed with %d:\n", ret);
"dmar_table_init() failed with %d:\n", ret);
if (x2apic_preenabled) if (x2apic_preenabled)
panic("x2apic enabled by bios. But IR enabling failed"); panic("x2apic enabled by bios. But IR enabling failed");
else else
printk(KERN_INFO pr_info("Not enabling x2apic,Intr-remapping\n");
"Not enabling x2apic,Intr-remapping\n");
return; return;
} }
@ -1355,7 +1348,7 @@ void enable_IR_x2apic(void)
ret = save_mask_IO_APIC_setup(); ret = save_mask_IO_APIC_setup();
if (ret) { if (ret) {
printk(KERN_INFO "Saving IO-APIC state failed: %d\n", ret); pr_info("Saving IO-APIC state failed: %d\n", ret);
goto end; goto end;
} }
@ -1390,14 +1383,11 @@ end:
if (!ret) { if (!ret) {
if (!x2apic_preenabled) if (!x2apic_preenabled)
printk(KERN_INFO pr_info("Enabled x2apic and interrupt-remapping\n");
"Enabled x2apic and interrupt-remapping\n");
else else
printk(KERN_INFO pr_info("Enabled Interrupt-remapping\n");
"Enabled Interrupt-remapping\n");
} else } else
printk(KERN_ERR pr_err("Failed to enable Interrupt-remapping and x2apic\n");
"Failed to enable Interrupt-remapping and x2apic\n");
#else #else
if (!cpu_has_x2apic) if (!cpu_has_x2apic)
return; return;
@ -1406,8 +1396,8 @@ end:
panic("x2apic enabled prior OS handover," panic("x2apic enabled prior OS handover,"
" enable CONFIG_INTR_REMAP"); " enable CONFIG_INTR_REMAP");
printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " pr_info("Enable CONFIG_INTR_REMAP for enabling intr-remapping "
" and x2apic\n"); " and x2apic\n");
#endif #endif
return; return;
@ -1424,7 +1414,7 @@ end:
static int __init detect_init_APIC(void) static int __init detect_init_APIC(void)
{ {
if (!cpu_has_apic) { if (!cpu_has_apic) {
printk(KERN_INFO "No local APIC present\n"); pr_info("No local APIC present\n");
return -1; return -1;
} }
@ -1465,8 +1455,8 @@ static int __init detect_init_APIC(void)
* "lapic" specified. * "lapic" specified.
*/ */
if (!force_enable_local_apic) { if (!force_enable_local_apic) {
printk(KERN_INFO "Local APIC disabled by BIOS -- " pr_info("Local APIC disabled by BIOS -- "
"you can enable it with \"lapic\"\n"); "you can enable it with \"lapic\"\n");
return -1; return -1;
} }
/* /*
@ -1476,8 +1466,7 @@ static int __init detect_init_APIC(void)
*/ */
rdmsr(MSR_IA32_APICBASE, l, h); rdmsr(MSR_IA32_APICBASE, l, h);
if (!(l & MSR_IA32_APICBASE_ENABLE)) { if (!(l & MSR_IA32_APICBASE_ENABLE)) {
printk(KERN_INFO pr_info("Local APIC disabled by BIOS -- reenabling.\n");
"Local APIC disabled by BIOS -- reenabling.\n");
l &= ~MSR_IA32_APICBASE_BASE; l &= ~MSR_IA32_APICBASE_BASE;
l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE; l |= MSR_IA32_APICBASE_ENABLE | APIC_DEFAULT_PHYS_BASE;
wrmsr(MSR_IA32_APICBASE, l, h); wrmsr(MSR_IA32_APICBASE, l, h);
@ -1490,7 +1479,7 @@ static int __init detect_init_APIC(void)
*/ */
features = cpuid_edx(1); features = cpuid_edx(1);
if (!(features & (1 << X86_FEATURE_APIC))) { if (!(features & (1 << X86_FEATURE_APIC))) {
printk(KERN_WARNING "Could not enable APIC!\n"); pr_warning("Could not enable APIC!\n");
return -1; return -1;
} }
set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); set_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
@ -1501,14 +1490,14 @@ static int __init detect_init_APIC(void)
if (l & MSR_IA32_APICBASE_ENABLE) if (l & MSR_IA32_APICBASE_ENABLE)
mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; mp_lapic_addr = l & MSR_IA32_APICBASE_BASE;
printk(KERN_INFO "Found and enabled local APIC!\n"); pr_info("Found and enabled local APIC!\n");
apic_pm_activate(); apic_pm_activate();
return 0; return 0;
no_apic: no_apic:
printk(KERN_INFO "No local APIC present or hardware disabled\n"); pr_info("No local APIC present or hardware disabled\n");
return -1; return -1;
} }
#endif #endif
@ -1584,12 +1573,12 @@ int __init APIC_init_uniprocessor(void)
{ {
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
if (disable_apic) { if (disable_apic) {
printk(KERN_INFO "Apic disabled\n"); pr_info("Apic disabled\n");
return -1; return -1;
} }
if (!cpu_has_apic) { if (!cpu_has_apic) {
disable_apic = 1; disable_apic = 1;
printk(KERN_INFO "Apic disabled by BIOS\n"); pr_info("Apic disabled by BIOS\n");
return -1; return -1;
} }
#else #else
@ -1601,8 +1590,8 @@ int __init APIC_init_uniprocessor(void)
*/ */
if (!cpu_has_apic && if (!cpu_has_apic &&
APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) { APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
printk(KERN_ERR "BIOS bug, local APIC 0x%x not detected!...\n", pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
boot_cpu_physical_apicid); boot_cpu_physical_apicid);
clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC);
return -1; return -1;
} }
@ -1695,8 +1684,8 @@ void smp_spurious_interrupt(struct pt_regs *regs)
add_pda(irq_spurious_count, 1); add_pda(irq_spurious_count, 1);
#else #else
/* see sw-dev-man vol 3, chapter 7.4.13.5 */ /* see sw-dev-man vol 3, chapter 7.4.13.5 */
printk(KERN_INFO "spurious APIC interrupt on CPU#%d, " pr_info("spurious APIC interrupt on CPU#%d, "
"should never happen.\n", smp_processor_id()); "should never happen.\n", smp_processor_id());
__get_cpu_var(irq_stat).irq_spurious_count++; __get_cpu_var(irq_stat).irq_spurious_count++;
#endif #endif
irq_exit(); irq_exit();
@ -1720,17 +1709,18 @@ void smp_error_interrupt(struct pt_regs *regs)
ack_APIC_irq(); ack_APIC_irq();
atomic_inc(&irq_err_count); atomic_inc(&irq_err_count);
/* Here is what the APIC error bits mean: /*
0: Send CS error * Here is what the APIC error bits mean:
1: Receive CS error * 0: Send CS error
2: Send accept error * 1: Receive CS error
3: Receive accept error * 2: Send accept error
4: Reserved * 3: Receive accept error
5: Send illegal vector * 4: Reserved
6: Received illegal vector * 5: Send illegal vector
7: Illegal register address * 6: Received illegal vector
*/ * 7: Illegal register address
printk(KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n", */
pr_debug("APIC error on CPU%d: %02x(%02x)\n",
smp_processor_id(), v , v1); smp_processor_id(), v , v1);
irq_exit(); irq_exit();
} }
@ -1834,15 +1824,15 @@ void __cpuinit generic_processor_info(int apicid, int version)
* Validate version * Validate version
*/ */
if (version == 0x0) { if (version == 0x0) {
printk(KERN_WARNING "BIOS bug, APIC version is 0 for CPU#%d! " pr_warning("BIOS bug, APIC version is 0 for CPU#%d! "
"fixing up to 0x10. (tell your hw vendor)\n", "fixing up to 0x10. (tell your hw vendor)\n",
version); version);
version = 0x10; version = 0x10;
} }
apic_version[apicid] = version; apic_version[apicid] = version;
if (num_processors >= NR_CPUS) { if (num_processors >= NR_CPUS) {
printk(KERN_WARNING "WARNING: NR_CPUS limit of %i reached." pr_warning("WARNING: NR_CPUS limit of %i reached."
" Processor ignored.\n", NR_CPUS); " Processor ignored.\n", NR_CPUS);
return; return;
} }
@ -2205,7 +2195,7 @@ static int __init apic_set_verbosity(char *arg)
else if (strcmp("verbose", arg) == 0) else if (strcmp("verbose", arg) == 0)
apic_verbosity = APIC_VERBOSE; apic_verbosity = APIC_VERBOSE;
else { else {
printk(KERN_WARNING "APIC Verbosity level %s not recognised" pr_warning("APIC Verbosity level %s not recognised"
" use apic=verbose or apic=debug\n", arg); " use apic=verbose or apic=debug\n", arg);
return -EINVAL; return -EINVAL;
} }