mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-11 12:28:41 +08:00
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: fsldma: allow Freescale Elo DMA driver to be compiled as a module fsldma: remove internal self-test from Freescale Elo DMA driver drivers/dma/dmatest.c: switch a GFP_ATOMIC to GFP_KERNEL dmatest: properly handle duplicate DMA channels drivers/dma/ioat_dma.c: drop code after return async_tx: make async_tx_run_dependencies() easier to read
This commit is contained in:
Linus Torvalds
commit
b91385236c
@ -115,34 +115,32 @@ EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
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* (start) dependent operations on their target channel
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* @tx: transaction with dependencies
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*/
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void
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async_tx_run_dependencies(struct dma_async_tx_descriptor *tx)
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void async_tx_run_dependencies(struct dma_async_tx_descriptor *tx)
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{
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struct dma_async_tx_descriptor *next = tx->next;
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struct dma_async_tx_descriptor *dep = tx->next;
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struct dma_async_tx_descriptor *dep_next;
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struct dma_chan *chan;
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if (!next)
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if (!dep)
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return;
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tx->next = NULL;
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chan = next->chan;
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chan = dep->chan;
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/* keep submitting up until a channel switch is detected
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* in that case we will be called again as a result of
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* processing the interrupt from async_tx_channel_switch
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*/
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while (next && next->chan == chan) {
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struct dma_async_tx_descriptor *_next;
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for (; dep; dep = dep_next) {
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spin_lock_bh(&dep->lock);
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dep->parent = NULL;
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dep_next = dep->next;
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if (dep_next && dep_next->chan == chan)
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dep->next = NULL; /* ->next will be submitted */
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else
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dep_next = NULL; /* submit current dep and terminate */
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spin_unlock_bh(&dep->lock);
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spin_lock_bh(&next->lock);
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next->parent = NULL;
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_next = next->next;
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if (_next && _next->chan == chan)
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next->next = NULL;
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spin_unlock_bh(&next->lock);
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next->tx_submit(next);
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next = _next;
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dep->tx_submit(dep);
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}
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chan->device->device_issue_pending(chan);
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@ -48,13 +48,13 @@ config DW_DMAC
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can be integrated in chips such as the Atmel AT32ap7000.
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config FSL_DMA
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bool "Freescale MPC85xx/MPC83xx DMA support"
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depends on PPC
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tristate "Freescale Elo and Elo Plus DMA support"
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depends on FSL_SOC
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select DMA_ENGINE
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---help---
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Enable support for the Freescale DMA engine. Now, it support
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MPC8560/40, MPC8555, MPC8548 and MPC8641 processors.
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The MPC8349, MPC8360 is also supported.
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Enable support for the Freescale Elo and Elo Plus DMA controllers.
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The Elo is the DMA controller on some 82xx and 83xx parts, and the
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Elo Plus is the DMA controller on 85xx and 86xx parts.
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config MV_XOR
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bool "Marvell XOR engine support"
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@ -325,7 +325,12 @@ static enum dma_state_client dmatest_add_channel(struct dma_chan *chan)
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struct dmatest_thread *thread;
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unsigned int i;
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dtc = kmalloc(sizeof(struct dmatest_chan), GFP_ATOMIC);
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/* Have we already been told about this channel? */
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list_for_each_entry(dtc, &dmatest_channels, node)
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if (dtc->chan == chan)
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return DMA_DUP;
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dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
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if (!dtc) {
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pr_warning("dmatest: No memory for %s\n", chan->dev.bus_id);
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return DMA_NAK;
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@ -370,7 +370,10 @@ static int fsl_dma_alloc_chan_resources(struct dma_chan *chan,
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struct dma_client *client)
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{
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struct fsl_dma_chan *fsl_chan = to_fsl_chan(chan);
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LIST_HEAD(tmp_list);
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/* Has this channel already been allocated? */
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if (fsl_chan->desc_pool)
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return 1;
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/* We need the descriptor to be aligned to 32bytes
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* for meeting FSL DMA specification requirement.
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@ -410,6 +413,8 @@ static void fsl_dma_free_chan_resources(struct dma_chan *chan)
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}
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spin_unlock_irqrestore(&fsl_chan->desc_lock, flags);
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dma_pool_destroy(fsl_chan->desc_pool);
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fsl_chan->desc_pool = NULL;
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}
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static struct dma_async_tx_descriptor *
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@ -786,159 +791,29 @@ static void dma_do_tasklet(unsigned long data)
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fsl_chan_ld_cleanup(fsl_chan);
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}
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static void fsl_dma_callback_test(void *param)
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static int __devinit fsl_dma_chan_probe(struct fsl_dma_device *fdev,
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struct device_node *node, u32 feature, const char *compatible)
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{
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struct fsl_dma_chan *fsl_chan = param;
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if (fsl_chan)
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dev_dbg(fsl_chan->dev, "selftest: callback is ok!\n");
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}
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static int fsl_dma_self_test(struct fsl_dma_chan *fsl_chan)
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{
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struct dma_chan *chan;
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int err = 0;
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dma_addr_t dma_dest, dma_src;
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dma_cookie_t cookie;
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u8 *src, *dest;
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int i;
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size_t test_size;
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struct dma_async_tx_descriptor *tx1, *tx2, *tx3;
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test_size = 4096;
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src = kmalloc(test_size * 2, GFP_KERNEL);
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if (!src) {
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dev_err(fsl_chan->dev,
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"selftest: Cannot alloc memory for test!\n");
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return -ENOMEM;
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}
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dest = src + test_size;
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for (i = 0; i < test_size; i++)
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src[i] = (u8) i;
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chan = &fsl_chan->common;
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if (fsl_dma_alloc_chan_resources(chan, NULL) < 1) {
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dev_err(fsl_chan->dev,
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"selftest: Cannot alloc resources for DMA\n");
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err = -ENODEV;
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goto out;
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}
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/* TX 1 */
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dma_src = dma_map_single(fsl_chan->dev, src, test_size / 2,
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DMA_TO_DEVICE);
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dma_dest = dma_map_single(fsl_chan->dev, dest, test_size / 2,
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DMA_FROM_DEVICE);
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tx1 = fsl_dma_prep_memcpy(chan, dma_dest, dma_src, test_size / 2, 0);
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async_tx_ack(tx1);
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cookie = fsl_dma_tx_submit(tx1);
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fsl_dma_memcpy_issue_pending(chan);
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msleep(2);
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if (fsl_dma_is_complete(chan, cookie, NULL, NULL) != DMA_SUCCESS) {
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dev_err(fsl_chan->dev, "selftest: Time out!\n");
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err = -ENODEV;
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goto free_resources;
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}
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/* Test free and re-alloc channel resources */
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fsl_dma_free_chan_resources(chan);
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if (fsl_dma_alloc_chan_resources(chan, NULL) < 1) {
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dev_err(fsl_chan->dev,
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"selftest: Cannot alloc resources for DMA\n");
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err = -ENODEV;
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goto free_resources;
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}
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/* Continue to test
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* TX 2
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*/
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dma_src = dma_map_single(fsl_chan->dev, src + test_size / 2,
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test_size / 4, DMA_TO_DEVICE);
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dma_dest = dma_map_single(fsl_chan->dev, dest + test_size / 2,
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test_size / 4, DMA_FROM_DEVICE);
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tx2 = fsl_dma_prep_memcpy(chan, dma_dest, dma_src, test_size / 4, 0);
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async_tx_ack(tx2);
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/* TX 3 */
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dma_src = dma_map_single(fsl_chan->dev, src + test_size * 3 / 4,
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test_size / 4, DMA_TO_DEVICE);
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dma_dest = dma_map_single(fsl_chan->dev, dest + test_size * 3 / 4,
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test_size / 4, DMA_FROM_DEVICE);
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tx3 = fsl_dma_prep_memcpy(chan, dma_dest, dma_src, test_size / 4, 0);
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async_tx_ack(tx3);
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/* Interrupt tx test */
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tx1 = fsl_dma_prep_interrupt(chan, 0);
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async_tx_ack(tx1);
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cookie = fsl_dma_tx_submit(tx1);
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/* Test exchanging the prepared tx sort */
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cookie = fsl_dma_tx_submit(tx3);
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cookie = fsl_dma_tx_submit(tx2);
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if (dma_has_cap(DMA_INTERRUPT, ((struct fsl_dma_device *)
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dev_get_drvdata(fsl_chan->dev->parent))->common.cap_mask)) {
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tx3->callback = fsl_dma_callback_test;
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tx3->callback_param = fsl_chan;
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}
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fsl_dma_memcpy_issue_pending(chan);
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msleep(2);
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if (fsl_dma_is_complete(chan, cookie, NULL, NULL) != DMA_SUCCESS) {
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dev_err(fsl_chan->dev, "selftest: Time out!\n");
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err = -ENODEV;
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goto free_resources;
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}
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err = memcmp(src, dest, test_size);
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if (err) {
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for (i = 0; (*(src + i) == *(dest + i)) && (i < test_size);
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i++);
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dev_err(fsl_chan->dev, "selftest: Test failed, data %d/%ld is "
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"error! src 0x%x, dest 0x%x\n",
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i, (long)test_size, *(src + i), *(dest + i));
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}
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free_resources:
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fsl_dma_free_chan_resources(chan);
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out:
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kfree(src);
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return err;
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}
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static int __devinit of_fsl_dma_chan_probe(struct of_device *dev,
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const struct of_device_id *match)
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{
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struct fsl_dma_device *fdev;
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struct fsl_dma_chan *new_fsl_chan;
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int err;
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fdev = dev_get_drvdata(dev->dev.parent);
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BUG_ON(!fdev);
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/* alloc channel */
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new_fsl_chan = kzalloc(sizeof(struct fsl_dma_chan), GFP_KERNEL);
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if (!new_fsl_chan) {
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dev_err(&dev->dev, "No free memory for allocating "
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dev_err(fdev->dev, "No free memory for allocating "
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"dma channels!\n");
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return -ENOMEM;
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}
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/* get dma channel register base */
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err = of_address_to_resource(dev->node, 0, &new_fsl_chan->reg);
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err = of_address_to_resource(node, 0, &new_fsl_chan->reg);
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if (err) {
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dev_err(&dev->dev, "Can't get %s property 'reg'\n",
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dev->node->full_name);
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dev_err(fdev->dev, "Can't get %s property 'reg'\n",
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node->full_name);
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goto err_no_reg;
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}
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new_fsl_chan->feature = *(u32 *)match->data;
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new_fsl_chan->feature = feature;
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if (!fdev->feature)
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fdev->feature = new_fsl_chan->feature;
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@ -948,13 +823,13 @@ static int __devinit of_fsl_dma_chan_probe(struct of_device *dev,
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*/
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WARN_ON(fdev->feature != new_fsl_chan->feature);
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new_fsl_chan->dev = &dev->dev;
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new_fsl_chan->dev = &new_fsl_chan->common.dev;
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new_fsl_chan->reg_base = ioremap(new_fsl_chan->reg.start,
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new_fsl_chan->reg.end - new_fsl_chan->reg.start + 1);
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new_fsl_chan->id = ((new_fsl_chan->reg.start - 0x100) & 0xfff) >> 7;
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if (new_fsl_chan->id > FSL_DMA_MAX_CHANS_PER_DEVICE) {
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dev_err(&dev->dev, "There is no %d channel!\n",
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dev_err(fdev->dev, "There is no %d channel!\n",
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new_fsl_chan->id);
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err = -EINVAL;
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goto err_no_chan;
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@ -988,29 +863,23 @@ static int __devinit of_fsl_dma_chan_probe(struct of_device *dev,
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&fdev->common.channels);
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fdev->common.chancnt++;
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new_fsl_chan->irq = irq_of_parse_and_map(dev->node, 0);
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new_fsl_chan->irq = irq_of_parse_and_map(node, 0);
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if (new_fsl_chan->irq != NO_IRQ) {
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err = request_irq(new_fsl_chan->irq,
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&fsl_dma_chan_do_interrupt, IRQF_SHARED,
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"fsldma-channel", new_fsl_chan);
|
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if (err) {
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||||
dev_err(&dev->dev, "DMA channel %s request_irq error "
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||||
"with return %d\n", dev->node->full_name, err);
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||||
dev_err(fdev->dev, "DMA channel %s request_irq error "
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||||
"with return %d\n", node->full_name, err);
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||||
goto err_no_irq;
|
||||
}
|
||||
}
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||||
|
||||
err = fsl_dma_self_test(new_fsl_chan);
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||||
if (err)
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||||
goto err_self_test;
|
||||
|
||||
dev_info(&dev->dev, "#%d (%s), irq %d\n", new_fsl_chan->id,
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||||
match->compatible, new_fsl_chan->irq);
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||||
dev_info(fdev->dev, "#%d (%s), irq %d\n", new_fsl_chan->id,
|
||||
compatible, new_fsl_chan->irq);
|
||||
|
||||
return 0;
|
||||
|
||||
err_self_test:
|
||||
free_irq(new_fsl_chan->irq, new_fsl_chan);
|
||||
err_no_irq:
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||||
list_del(&new_fsl_chan->common.device_node);
|
||||
err_no_chan:
|
||||
@ -1020,38 +889,20 @@ err_no_reg:
|
||||
return err;
|
||||
}
|
||||
|
||||
const u32 mpc8540_dma_ip_feature = FSL_DMA_IP_85XX | FSL_DMA_BIG_ENDIAN;
|
||||
const u32 mpc8349_dma_ip_feature = FSL_DMA_IP_83XX | FSL_DMA_LITTLE_ENDIAN;
|
||||
|
||||
static struct of_device_id of_fsl_dma_chan_ids[] = {
|
||||
{
|
||||
.compatible = "fsl,eloplus-dma-channel",
|
||||
.data = (void *)&mpc8540_dma_ip_feature,
|
||||
},
|
||||
{
|
||||
.compatible = "fsl,elo-dma-channel",
|
||||
.data = (void *)&mpc8349_dma_ip_feature,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct of_platform_driver of_fsl_dma_chan_driver = {
|
||||
.name = "of-fsl-dma-channel",
|
||||
.match_table = of_fsl_dma_chan_ids,
|
||||
.probe = of_fsl_dma_chan_probe,
|
||||
};
|
||||
|
||||
static __init int of_fsl_dma_chan_init(void)
|
||||
static void fsl_dma_chan_remove(struct fsl_dma_chan *fchan)
|
||||
{
|
||||
return of_register_platform_driver(&of_fsl_dma_chan_driver);
|
||||
free_irq(fchan->irq, fchan);
|
||||
list_del(&fchan->common.device_node);
|
||||
iounmap(fchan->reg_base);
|
||||
kfree(fchan);
|
||||
}
|
||||
|
||||
static int __devinit of_fsl_dma_probe(struct of_device *dev,
|
||||
const struct of_device_id *match)
|
||||
{
|
||||
int err;
|
||||
unsigned int irq;
|
||||
struct fsl_dma_device *fdev;
|
||||
struct device_node *child;
|
||||
|
||||
fdev = kzalloc(sizeof(struct fsl_dma_device), GFP_KERNEL);
|
||||
if (!fdev) {
|
||||
@ -1085,9 +936,9 @@ static int __devinit of_fsl_dma_probe(struct of_device *dev,
|
||||
fdev->common.device_issue_pending = fsl_dma_memcpy_issue_pending;
|
||||
fdev->common.dev = &dev->dev;
|
||||
|
||||
irq = irq_of_parse_and_map(dev->node, 0);
|
||||
if (irq != NO_IRQ) {
|
||||
err = request_irq(irq, &fsl_dma_do_interrupt, IRQF_SHARED,
|
||||
fdev->irq = irq_of_parse_and_map(dev->node, 0);
|
||||
if (fdev->irq != NO_IRQ) {
|
||||
err = request_irq(fdev->irq, &fsl_dma_do_interrupt, IRQF_SHARED,
|
||||
"fsldma-device", fdev);
|
||||
if (err) {
|
||||
dev_err(&dev->dev, "DMA device request_irq error "
|
||||
@ -1097,7 +948,21 @@ static int __devinit of_fsl_dma_probe(struct of_device *dev,
|
||||
}
|
||||
|
||||
dev_set_drvdata(&(dev->dev), fdev);
|
||||
of_platform_bus_probe(dev->node, of_fsl_dma_chan_ids, &dev->dev);
|
||||
|
||||
/* We cannot use of_platform_bus_probe() because there is no
|
||||
* of_platform_bus_remove. Instead, we manually instantiate every DMA
|
||||
* channel object.
|
||||
*/
|
||||
for_each_child_of_node(dev->node, child) {
|
||||
if (of_device_is_compatible(child, "fsl,eloplus-dma-channel"))
|
||||
fsl_dma_chan_probe(fdev, child,
|
||||
FSL_DMA_IP_85XX | FSL_DMA_BIG_ENDIAN,
|
||||
"fsl,eloplus-dma-channel");
|
||||
if (of_device_is_compatible(child, "fsl,elo-dma-channel"))
|
||||
fsl_dma_chan_probe(fdev, child,
|
||||
FSL_DMA_IP_83XX | FSL_DMA_LITTLE_ENDIAN,
|
||||
"fsl,elo-dma-channel");
|
||||
}
|
||||
|
||||
dma_async_device_register(&fdev->common);
|
||||
return 0;
|
||||
@ -1109,6 +974,30 @@ err_no_reg:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int of_fsl_dma_remove(struct of_device *of_dev)
|
||||
{
|
||||
struct fsl_dma_device *fdev;
|
||||
unsigned int i;
|
||||
|
||||
fdev = dev_get_drvdata(&of_dev->dev);
|
||||
|
||||
dma_async_device_unregister(&fdev->common);
|
||||
|
||||
for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++)
|
||||
if (fdev->chan[i])
|
||||
fsl_dma_chan_remove(fdev->chan[i]);
|
||||
|
||||
if (fdev->irq != NO_IRQ)
|
||||
free_irq(fdev->irq, fdev);
|
||||
|
||||
iounmap(fdev->reg_base);
|
||||
|
||||
kfree(fdev);
|
||||
dev_set_drvdata(&of_dev->dev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct of_device_id of_fsl_dma_ids[] = {
|
||||
{ .compatible = "fsl,eloplus-dma", },
|
||||
{ .compatible = "fsl,elo-dma", },
|
||||
@ -1116,15 +1005,32 @@ static struct of_device_id of_fsl_dma_ids[] = {
|
||||
};
|
||||
|
||||
static struct of_platform_driver of_fsl_dma_driver = {
|
||||
.name = "of-fsl-dma",
|
||||
.name = "fsl-elo-dma",
|
||||
.match_table = of_fsl_dma_ids,
|
||||
.probe = of_fsl_dma_probe,
|
||||
.remove = of_fsl_dma_remove,
|
||||
};
|
||||
|
||||
static __init int of_fsl_dma_init(void)
|
||||
{
|
||||
return of_register_platform_driver(&of_fsl_dma_driver);
|
||||
int ret;
|
||||
|
||||
pr_info("Freescale Elo / Elo Plus DMA driver\n");
|
||||
|
||||
ret = of_register_platform_driver(&of_fsl_dma_driver);
|
||||
if (ret)
|
||||
pr_err("fsldma: failed to register platform driver\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit of_fsl_dma_exit(void)
|
||||
{
|
||||
of_unregister_platform_driver(&of_fsl_dma_driver);
|
||||
}
|
||||
|
||||
subsys_initcall(of_fsl_dma_chan_init);
|
||||
subsys_initcall(of_fsl_dma_init);
|
||||
module_exit(of_fsl_dma_exit);
|
||||
|
||||
MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
@ -114,6 +114,7 @@ struct fsl_dma_device {
|
||||
struct dma_device common;
|
||||
struct fsl_dma_chan *chan[FSL_DMA_MAX_CHANS_PER_DEVICE];
|
||||
u32 feature; /* The same as DMA channels */
|
||||
int irq; /* Channel IRQ */
|
||||
};
|
||||
|
||||
/* Define macros for fsl_dma_chan->feature property */
|
||||
|
||||
@ -971,11 +971,9 @@ static struct ioat_desc_sw *ioat_dma_get_next_descriptor(
|
||||
switch (ioat_chan->device->version) {
|
||||
case IOAT_VER_1_2:
|
||||
return ioat1_dma_get_next_descriptor(ioat_chan);
|
||||
break;
|
||||
case IOAT_VER_2_0:
|
||||
case IOAT_VER_3_0:
|
||||
return ioat2_dma_get_next_descriptor(ioat_chan);
|
||||
break;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user