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ARM: arm925: ensure assembly sets up writethrough mapping
Commit ca8f0b0a54
("ARM: ensure C page table setup code follows
assembly code") did what it said on the tin, but some of the older
CPU code omitted the default cache policy from their files. This
results in the kernel running with the caches disabled. Fix this
for ARM925.
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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b8d8772e53
@ -502,6 +502,7 @@ __\name\()_proc_info:
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.long \cpu_val
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.long \cpu_mask
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.long PMD_TYPE_SECT | \
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PMD_SECT_CACHEABLE | \
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PMD_BIT4 | \
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PMD_SECT_AP_WRITE | \
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PMD_SECT_AP_READ
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