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ACPICA: Tables: Add PPTT table definitions
ACPICA commit c27465d07fd008ba71c1f687b2715267701bc8ad This patch adds PPTT (Processor Properties Topology Table, defined in ACPI spec 6.2) support in ACPICA core, including table definitions expressed in C structures and macros. Lv Zheng. Link: https://github.com/acpica/acpica/commit/c27465d0 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -69,6 +69,7 @@
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#define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
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#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
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#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
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#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
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#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
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#define ACPI_SIG_SLIT "SLIT" /* System Locality Distance Information Table */
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#define ACPI_SIG_SRAT "SRAT" /* System Resource Affinity Table */
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@ -1263,6 +1264,85 @@ struct acpi_nfit_flush_address {
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u64 hint_address[1]; /* Variable length */
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};
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/*******************************************************************************
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*
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* PPTT - Processor Properties Topology Table (ACPI 6.2)
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* Version 1
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*
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******************************************************************************/
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struct acpi_table_pptt {
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struct acpi_table_header header; /* Common ACPI table header */
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};
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/* Values for Type field above */
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enum acpi_pptt_type {
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ACPI_PPTT_TYPE_PROCESSOR = 0,
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ACPI_PPTT_TYPE_CACHE = 1,
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ACPI_PPTT_TYPE_ID = 2,
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ACPI_PPTT_TYPE_RESERVED = 3
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};
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/* 0: Processor Hierarchy Node Structure */
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struct acpi_pptt_processor {
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struct acpi_subtable_header header;
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u16 reserved;
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u32 flags;
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u32 parent;
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u32 acpi_processor_id;
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u32 number_of_priv_resources;
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};
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/* Flags */
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#define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */
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#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */
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/* 1: Cache Type Structure */
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struct acpi_pptt_cache {
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struct acpi_subtable_header header;
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u16 reserved;
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u32 flags;
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u32 next_level_of_cache;
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u32 size;
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u32 number_of_sets;
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u8 associativity;
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u8 attributes;
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u16 line_size;
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};
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/* Flags */
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#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
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#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
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#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
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#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
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#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
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#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
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#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
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/* Masks for Attributes */
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#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
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#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
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#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
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/* 2: ID Structure */
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struct acpi_pptt_id {
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struct acpi_subtable_header header;
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u16 reserved;
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u32 vendor_id;
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u64 level1_id;
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u64 level2_id;
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u16 major_rev;
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u16 minor_rev;
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u16 spin_rev;
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};
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/*******************************************************************************
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*
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* SBST - Smart Battery Specification Table
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