korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-25 21:24:08 +08:00
Code Issues Packages Projects Releases Wiki Activity

mfd: ti_am335x_tscadc: Gather the ctrl register logic in one place

Browse Source 
Instead of deriving in the probe and in the resume path the value of the
ctrl register, let's do it only once in the probe, save the value of
this register (all but the subsystem enable bit) in the driver's
structure and use it from the resume callback.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211015081506.933180-23-miquel.raynal@bootlin.com
This commit is contained in:
Miquel Raynal 2021-10-15 10:14:40 +02:00 committed by Lee Jones
parent 3dafbe93be
commit b813f32030
2 changed files with 15 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
drivers/mfd/ti_am335x_tscadc.c
View File

@ -121,7 +121,7 @@ static int ti_tscadc_probe(struct platform_device *pdev)
struct property *prop;
const __be32 *cur;
u32 val;
int err, ctrl;
int err;
int tsc_wires = 0, adc_channels = 0, cell_idx = 0, total_channels;
int readouts = 0;
@ -217,22 +217,25 @@ static int ti_tscadc_probe(struct platform_device *pdev)
tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;
regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
/* Set the control register bits */
ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
/*
* Set the control register bits. tscadc->ctrl stores the configuration
* of the CTRL register but not the subsystem enable bit which must be
* added manually when timely.
*/
tscadc->ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
if (tsc_wires > 0) {
tscadc->tsc_wires = tsc_wires;
tscadc->ctrl |= CNTRLREG_TSCENB;
if (tsc_wires == 5)
ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
tscadc->ctrl |= CNTRLREG_5WIRE;
else
ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
tscadc->ctrl |= CNTRLREG_4WIRE;
}
regmap_write(tscadc->regmap, REG_CTRL, ctrl);
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
tscadc_idle_config(tscadc);
/* Enable the TSC module enable bit */
ctrl |= CNTRLREG_TSCSSENB;
regmap_write(tscadc->regmap, REG_CTRL, ctrl);
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_TSCSSENB);
/* TSC Cell */
if (tsc_wires > 0) {
@ -307,27 +310,13 @@ static int __maybe_unused tscadc_suspend(struct device *dev)
static int __maybe_unused tscadc_resume(struct device *dev)
{
struct ti_tscadc_dev *tscadc = dev_get_drvdata(dev);
u32 ctrl;
pm_runtime_get_sync(dev);
/* context restore */
regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);
ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID;
if (tscadc->tsc_wires > 0) {
if (tscadc->tsc_wires == 5)
ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB;
else
ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB;
}
regmap_write(tscadc->regmap, REG_CTRL, ctrl);
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl);
tscadc_idle_config(tscadc);
ctrl |= CNTRLREG_TSCSSENB;
regmap_write(tscadc->regmap, REG_CTRL, ctrl);
regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_TSCSSENB);
return 0;
}

2
include/linux/mfd/ti_am335x_tscadc.h
View File

@ -177,8 +177,8 @@ struct ti_tscadc_dev {
phys_addr_t tscadc_phys_base;
const struct ti_tscadc_data *data;
int irq;
int tsc_wires;
struct mfd_cell cells[TSCADC_CELLS];
u32 ctrl;
u32 reg_se_cache;
bool adc_waiting;
bool adc_in_use;