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arm64: dts: qcom: correct DWC3 node names and unit addresses

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Align DWC3 USB node names with DT schema ("usb" is expected) and correct
the unit addresses to match the "reg" property.  This also implies
overriding nodes by label, instead of full path.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220504131923.214367-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Krzysztof Kozlowski 2022-05-04 15:19:16 +02:00 committed by Greg Kroah-Hartman
parent 16946a6071
commit b77a1c4d6b
11 changed files with 37 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/arm64/boot/dts/qcom/apq8096-db820c.dts
View File

@ -1046,22 +1046,22 @@
&usb2 {
status = "okay";
extcon = <&usb2_id>;
};
dwc3@7600000 {
extcon = <&usb2_id>;
dr_mode = "otg";
maximum-speed = "high-speed";
};
&usb2_dwc3 {
extcon = <&usb2_id>;
dr_mode = "otg";
maximum-speed = "high-speed";
};
&usb3 {
status = "okay";
extcon = <&usb3_id>;
};
dwc3@6a00000 {
extcon = <&usb3_id>;
dr_mode = "otg";
};
&usb3_dwc3 {
extcon = <&usb3_id>;
dr_mode = "otg";
};
&usb3phy {

6
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -643,7 +643,7 @@
status = "disabled";
};
usb2: usb2@7000000 {
usb2: usb@70f8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x070F8800 0x0 0x400>;
#address-cells = <2>;
@ -720,7 +720,7 @@
status = "disabled";
};
usb3: usb3@8A00000 {
usb3: usb@8af8800 {
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
reg = <0x0 0x8AF8800 0x0 0x400>;
#address-cells = <2>;
@ -746,7 +746,7 @@
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
dwc_0: usb@8A00000 {
dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x0 0x8A00000 0x0 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -578,7 +578,7 @@
resets = <&gcc GCC_USB0_BCR>;
status = "disabled";
dwc_0: dwc3@8a00000 {
dwc_0: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x8a00000 0xcd00>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
@ -618,7 +618,7 @@
resets = <&gcc GCC_USB1_BCR>;
status = "disabled";
dwc_1: dwc3@8c00000 {
dwc_1: usb@8c00000 {
compatible = "snps,dwc3";
reg = <0x8c00000 0xcd00>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;

20
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
View File

@ -296,19 +296,19 @@
extcon = <&typec>;
qcom,select-utmi-as-pipe-clk;
};
dwc3@6a00000 {
extcon = <&typec>;
&usb3_dwc3 {
extcon = <&typec>;
/* usb3-phy is not used on this device */
phys = <&hsusb_phy1>;
phy-names = "usb2-phy";
/* usb3-phy is not used on this device */
phys = <&hsusb_phy1>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
snps,is-utmi-l1-suspend;
snps,usb2-gadget-lpm-disable;
snps,hird-threshold = /bits/ 8 <0>;
};
maximum-speed = "high-speed";
snps,is-utmi-l1-suspend;
snps,usb2-gadget-lpm-disable;
snps,hird-threshold = /bits/ 8 <0>;
};
&hsusb_phy1 {

4
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -2625,7 +2625,7 @@
power-domains = <&gcc USB30_GDSC>;
status = "disabled";
usb3_dwc3: dwc3@6a00000 {
usb3_dwc3: usb@6a00000 {
compatible = "snps,dwc3";
reg = <0x06a00000 0xcc00>;
interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
@ -2953,7 +2953,7 @@
qcom,select-utmi-as-pipe-clk;
status = "disabled";
dwc3@7600000 {
usb2_dwc3: usb@7600000 {
compatible = "snps,dwc3";
reg = <0x07600000 0xcc00>;
interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -2025,7 +2025,7 @@
resets = <&gcc GCC_USB_30_BCR>;
usb3_dwc3: dwc3@a800000 {
usb3_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0x0a800000 0xcd00>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;

7
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
View File

@ -337,9 +337,10 @@
&usb3 {
status = "okay";
dwc3@7580000 {
dr_mode = "host";
};
};
&usb3_dwc3 {
dr_mode = "host";
};
&usb2_phy_prim {

4
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -544,7 +544,7 @@
assigned-clock-rates = <19200000>, <200000000>;
status = "disabled";
dwc3@7580000 {
usb3_dwc3: usb@7580000 {
compatible = "snps,dwc3";
reg = <0x07580000 0xcd00>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
@ -573,7 +573,7 @@
assigned-clock-rates = <19200000>, <133333333>;
status = "disabled";
dwc3@78c0000 {
usb@78c0000 {
compatible = "snps,dwc3";
reg = <0x078c0000 0xcc00>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -2786,7 +2786,7 @@
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_1_dwc3: dwc3@a600000 {
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xe000>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -3868,7 +3868,7 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_1_dwc3: dwc3@a600000 {
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
@ -3916,7 +3916,7 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_2_dwc3: dwc3@a800000 {
usb_2_dwc3: usb@a800000 {
compatible = "snps,dwc3";
reg = <0 0x0a800000 0 0xcd00>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/qcom/sm8150.dtsi
View File

@ -3317,7 +3317,7 @@
resets = <&gcc GCC_USB30_PRIM_BCR>;
usb_1_dwc3: dwc3@a600000 {
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xcd00>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;