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x86/alternative: Complicate optimize_nops() some more
Because: SMP alternatives: ffffffff810026dc: [2:44) optimized NOPs: eb 2a eb 28 cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc is quite daft, make things more complicated and have the NOP runlength detection eat the preceding JMP if they both end at the same target. SMP alternatives: ffffffff810026dc: [0:44) optimized NOPs: eb 2a cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230208171431.433132442@infradead.org
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@ -114,6 +114,8 @@ const unsigned char * const x86_nops[ASM_NOP_MAX+1] =
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};
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/*
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* Fill the buffer with a single effective instruction of size @len.
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*
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* In order not to issue an ORC stack depth tracking CFI entry (Call Frame Info)
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* for every single-byte NOP, try to generate the maximally available NOP of
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* size <= ASM_NOP_MAX such that only a single CFI entry is generated (vs one for
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@ -152,6 +154,9 @@ extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
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extern s32 __smp_locks[], __smp_locks_end[];
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void text_poke_early(void *addr, const void *opcode, size_t len);
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/*
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* Matches NOP and NOPL, not any of the other possible NOPs.
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*/
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static bool insn_is_nop(struct insn *insn)
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{
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if (insn->opcode.bytes[0] == 0x90)
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@ -165,6 +170,10 @@ static bool insn_is_nop(struct insn *insn)
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return false;
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}
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/*
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* Find the offset of the first non-NOP instruction starting at @offset
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* but no further than @len.
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*/
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static int skip_nops(u8 *instr, int offset, int len)
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{
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struct insn insn;
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@ -180,12 +189,47 @@ static int skip_nops(u8 *instr, int offset, int len)
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return offset;
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}
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/*
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* Optimize a sequence of NOPs, possibly preceded by an unconditional jump
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* to the end of the NOP sequence into a single NOP.
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*/
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static bool __optimize_nops(u8 *instr, size_t len, struct insn *insn,
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int *next, int *prev, int *target)
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{
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int i = *next - insn->length;
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switch (insn->opcode.bytes[0]) {
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case JMP8_INSN_OPCODE:
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case JMP32_INSN_OPCODE:
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*prev = i;
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*target = *next + insn->immediate.value;
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return false;
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}
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if (insn_is_nop(insn)) {
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int nop = i;
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*next = skip_nops(instr, *next, len);
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if (*target && *next == *target)
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nop = *prev;
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add_nop(instr + nop, *next - nop);
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DUMP_BYTES(ALT, instr, len, "%px: [%d:%d) optimized NOPs: ", instr, nop, *next);
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return true;
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}
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*target = 0;
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return false;
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}
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/*
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* "noinline" to cause control flow change and thus invalidate I$ and
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* cause refetch after modification.
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*/
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static void __init_or_module noinline optimize_nops(u8 *instr, size_t len)
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{
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int prev, target = 0;
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for (int next, i = 0; i < len; i = next) {
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struct insn insn;
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@ -194,11 +238,7 @@ static void __init_or_module noinline optimize_nops(u8 *instr, size_t len)
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next = i + insn.length;
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if (insn_is_nop(&insn)) {
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next = skip_nops(instr, next, len);
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add_nop(instr + i, next - i);
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DUMP_BYTES(ALT, instr, len, "%px: [%d:%d) optimized NOPs: ", instr, i, next);
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}
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__optimize_nops(instr, len, &insn, &next, &prev, &target);
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}
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}
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@ -275,6 +315,8 @@ bool need_reloc(unsigned long offset, u8 *src, size_t src_len)
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static void __init_or_module noinline
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apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)
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{
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int prev, target = 0;
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for (int next, i = 0; i < len; i = next) {
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struct insn insn;
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@ -283,6 +325,9 @@ apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)
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next = i + insn.length;
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if (__optimize_nops(buf, len, &insn, &next, &prev, &target))
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continue;
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switch (insn.opcode.bytes[0]) {
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case 0x0f:
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if (insn.opcode.bytes[1] < 0x80 ||
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@ -324,11 +369,6 @@ apply_relocation(u8 *buf, size_t len, u8 *dest, u8 *src, size_t src_len)
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src - dest);
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}
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}
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if (insn_is_nop(&insn)) {
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next = skip_nops(buf, next, len);
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add_nop(buf + i, next - i);
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}
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}
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}
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