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powerpc/signal: Don't manage floating point regs when no FPU
There is no point in copying floating point regs when there is no FPU and MATH_EMULATION is not selected. Create a new CONFIG_PPC_FPU_REGS bool that is selected by CONFIG_MATH_EMULATION and CONFIG_PPC_FPU, and use it to opt out everything related to fp_state in thread_struct. The asm const used only by fpu.S are opted out with CONFIG_PPC_FPU as fpu.S build is conditionnal to CONFIG_PPC_FPU. The following app spends approx 8.1 seconds system time on an 8xx without the patch, and 7.0 seconds with the patch (13.5% reduction). On an 832x, it spends approx 2.6 seconds system time without the patch and 2.1 seconds with the patch (19% reduction). void sigusr1(int sig) { } int main(int argc, char **argv) { int i = 100000; signal(SIGUSR1, sigusr1); for (;i--;) raise(SIGUSR1); exit(0); } Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/7569070083e6cd5b279bb5023da601aba3c06f3c.1597770847.git.christophe.leroy@csgroup.eu
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@ -422,6 +422,7 @@ config HUGETLB_PAGE_SIZE_VARIABLE
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config MATH_EMULATION
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bool "Math emulation"
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depends on 4xx || PPC_8xx || PPC_MPC832x || BOOKE
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select PPC_FPU_REGS
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help
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Some PowerPC chips designed for embedded applications do not have
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a floating-point unit and therefore do not implement the
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@ -164,8 +164,10 @@ struct thread_struct {
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#endif
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/* Debug Registers */
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struct debug_reg debug;
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#ifdef CONFIG_PPC_FPU_REGS
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struct thread_fp_state fp_state;
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struct thread_fp_state *fp_save_area;
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#endif
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int fpexc_mode; /* floating-point exception mode */
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unsigned int align_ctl; /* alignment handling control */
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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@ -110,9 +110,11 @@ int main(void)
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#ifdef CONFIG_BOOKE
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OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
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#endif
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#ifdef CONFIG_PPC_FPU
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OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
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OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
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OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
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#endif
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OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
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OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
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#ifdef CONFIG_ALTIVEC
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@ -1730,7 +1730,9 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
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p->thread.ptrace_bps[i] = NULL;
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#endif
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#ifdef CONFIG_PPC_FPU_REGS
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p->thread.fp_save_area = NULL;
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#endif
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#ifdef CONFIG_ALTIVEC
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p->thread.vr_save_area = NULL;
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#endif
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@ -1855,8 +1857,10 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
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#endif
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current->thread.load_slb = 0;
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current->thread.load_fp = 0;
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#ifdef CONFIG_PPC_FPU_REGS
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memset(¤t->thread.fp_state, 0, sizeof(current->thread.fp_state));
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current->thread.fp_save_area = NULL;
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#endif
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#ifdef CONFIG_ALTIVEC
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memset(¤t->thread.vr_state, 0, sizeof(current->thread.vr_state));
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current->thread.vr_state.vscr.u[3] = 0x00010000; /* Java mode disabled */
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@ -6,11 +6,11 @@
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CFLAGS_ptrace-view.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
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obj-y += ptrace.o ptrace-view.o
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obj-y += ptrace-fpu.o
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obj-$(CONFIG_PPC_FPU_REGS) += ptrace-fpu.o
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obj-$(CONFIG_COMPAT) += ptrace32.o
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obj-$(CONFIG_VSX) += ptrace-vsx.o
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ifneq ($(CONFIG_VSX),y)
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obj-y += ptrace-novsx.o
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obj-$(CONFIG_PPC_FPU_REGS) += ptrace-novsx.o
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endif
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obj-$(CONFIG_ALTIVEC) += ptrace-altivec.o
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obj-$(CONFIG_SPE) += ptrace-spe.o
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@ -165,8 +165,22 @@ int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data);
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extern const struct user_regset_view user_ppc_native_view;
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/* ptrace-fpu */
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#ifdef CONFIG_PPC_FPU_REGS
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int ptrace_get_fpr(struct task_struct *child, int index, unsigned long *data);
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int ptrace_put_fpr(struct task_struct *child, int index, unsigned long data);
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#else
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static inline int
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ptrace_get_fpr(struct task_struct *child, int index, unsigned long *data)
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{
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return -EIO;
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}
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static inline int
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ptrace_put_fpr(struct task_struct *child, int index, unsigned long data)
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{
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return -EIO;
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}
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#endif
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/* ptrace-(no)adv */
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void ppc_gethwdinfo(struct ppc_debug_info *dbginfo);
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@ -521,11 +521,13 @@ static const struct user_regset native_regsets[] = {
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.size = sizeof(long), .align = sizeof(long),
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.regset_get = gpr_get, .set = gpr_set
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},
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#ifdef CONFIG_PPC_FPU_REGS
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[REGSET_FPR] = {
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.core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
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.size = sizeof(double), .align = sizeof(double),
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.regset_get = fpr_get, .set = fpr_set
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},
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#endif
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#ifdef CONFIG_ALTIVEC
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[REGSET_VMX] = {
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.core_note_type = NT_PPC_VMX, .n = 34,
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@ -34,7 +34,7 @@ unsigned long copy_fpr_to_user(void __user *to, struct task_struct *task);
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unsigned long copy_ckfpr_to_user(void __user *to, struct task_struct *task);
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unsigned long copy_fpr_from_user(struct task_struct *task, void __user *from);
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unsigned long copy_ckfpr_from_user(struct task_struct *task, void __user *from);
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#else
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#elif defined(CONFIG_PPC_FPU_REGS)
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static inline unsigned long
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copy_fpr_to_user(void __user *to, struct task_struct *task)
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{
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@ -63,6 +63,18 @@ copy_ckfpr_from_user(struct task_struct *task, void __user *from)
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ELF_NFPREG * sizeof(double));
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}
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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#else
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static inline unsigned long
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copy_fpr_to_user(void __user *to, struct task_struct *task)
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{
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return 0;
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}
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static inline unsigned long
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copy_fpr_from_user(struct task_struct *task, void __user *from)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_PPC64
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@ -814,7 +814,9 @@ int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset,
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}
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regs->link = tramp;
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#ifdef CONFIG_PPC_FPU_REGS
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tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
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#endif
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/* create a stack frame for the caller of the handler */
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newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
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@ -1271,7 +1273,9 @@ int handle_signal32(struct ksignal *ksig, sigset_t *oldset,
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regs->link = tramp;
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#ifdef CONFIG_PPC_FPU_REGS
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tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
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#endif
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/* create a stack frame for the caller of the handler */
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newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
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@ -1190,7 +1190,9 @@ static void parse_fpe(struct pt_regs *regs)
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flush_fp_to_thread(current);
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#ifdef CONFIG_PPC_FPU_REGS
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code = __parse_fpscr(current->thread.fp_state.fpscr);
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#endif
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_exception(SIGFPE, regs, code, regs->nip);
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}
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@ -218,9 +218,13 @@ config PPC_E500MC
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such as e5500/e6500), and must be disabled for running on
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e500v1 or e500v2.
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config PPC_FPU_REGS
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bool
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config PPC_FPU
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bool
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default y if PPC64
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select PPC_FPU_REGS
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config FSL_EMB_PERFMON
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bool "Freescale Embedded Perfmon"
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