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msm: iommu: Rework clock logic and add IOMMU bus clock control
Clean up the clock control code in the probe calls, and add support for controlling the clock for the IOMMU bus interconnect. With the (proper) clock driver in place, the clock control logic in the probe function can be made much cleaner since it does not have to deal with the placeholder driver anymore. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Reviewed-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
This commit is contained in:
parent
41f3f5138a
commit
b61401adf3
@ -280,7 +280,6 @@ static struct platform_device msm_root_iommu_dev = {
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static struct msm_iommu_dev jpegd_iommu = {
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.name = "jpegd",
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.clk_rate = -1
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};
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static struct msm_iommu_dev vpe_iommu = {
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@ -305,7 +304,6 @@ static struct msm_iommu_dev ijpeg_iommu = {
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static struct msm_iommu_dev vfe_iommu = {
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.name = "vfe",
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.clk_rate = -1
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};
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static struct msm_iommu_dev vcodec_a_iommu = {
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@ -318,17 +316,14 @@ static struct msm_iommu_dev vcodec_b_iommu = {
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static struct msm_iommu_dev gfx3d_iommu = {
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.name = "gfx3d",
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.clk_rate = 27000000
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};
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static struct msm_iommu_dev gfx2d0_iommu = {
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.name = "gfx2d0",
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.clk_rate = 27000000
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};
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static struct msm_iommu_dev gfx2d1_iommu = {
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.name = "gfx2d1",
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.clk_rate = 27000000
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};
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static struct platform_device msm_device_iommu_jpegd = {
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@ -45,14 +45,9 @@
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/**
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* struct msm_iommu_dev - a single IOMMU hardware instance
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* name Human-readable name given to this IOMMU HW instance
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* clk_rate Rate to set for this IOMMU's clock, if applicable to this
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* particular IOMMU. 0 means don't set a rate.
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* -1 means it is an AXI clock with no valid rate
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*
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*/
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struct msm_iommu_dev {
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const char *name;
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int clk_rate;
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};
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/**
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@ -1,4 +1,4 @@
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/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
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/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -29,6 +29,7 @@
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#include <mach/iommu_hw-8xxx.h>
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#include <mach/iommu.h>
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#include <mach/clk.h>
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struct iommu_ctx_iter_data {
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/* input */
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@ -130,117 +131,134 @@ static int msm_iommu_probe(struct platform_device *pdev)
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{
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struct resource *r, *r2;
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struct clk *iommu_clk;
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struct clk *iommu_pclk;
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struct msm_iommu_drvdata *drvdata;
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struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data;
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void __iomem *regs_base;
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resource_size_t len;
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int ret = 0, ncb, nm2v, irq;
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int ret, ncb, nm2v, irq;
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if (pdev->id != -1) {
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drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
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if (pdev->id == -1) {
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msm_iommu_root_dev = pdev;
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return 0;
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}
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if (!drvdata) {
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ret = -ENOMEM;
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goto fail;
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}
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drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
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if (!iommu_dev) {
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ret = -ENODEV;
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goto fail;
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}
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if (!drvdata) {
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ret = -ENOMEM;
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goto fail;
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}
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if (iommu_dev->clk_rate != 0) {
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iommu_clk = clk_get(&pdev->dev, "iommu_clk");
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if (!iommu_dev) {
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ret = -ENODEV;
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goto fail;
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}
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if (IS_ERR(iommu_clk)) {
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ret = -ENODEV;
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goto fail;
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}
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iommu_pclk = clk_get(NULL, "smmu_pclk");
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if (IS_ERR(iommu_pclk)) {
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ret = -ENODEV;
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goto fail;
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}
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if (iommu_dev->clk_rate > 0) {
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ret = clk_set_rate(iommu_clk,
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iommu_dev->clk_rate);
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if (ret) {
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clk_put(iommu_clk);
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goto fail;
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}
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}
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ret = clk_enable(iommu_pclk);
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if (ret)
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goto fail_enable;
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ret = clk_enable(iommu_clk);
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if (ret) {
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clk_put(iommu_clk);
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goto fail;
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}
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clk_put(iommu_clk);
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}
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iommu_clk = clk_get(&pdev->dev, "iommu_clk");
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r = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"physbase");
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if (!r) {
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ret = -ENODEV;
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goto fail;
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}
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if (!IS_ERR(iommu_clk)) {
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if (clk_get_rate(iommu_clk) == 0)
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clk_set_min_rate(iommu_clk, 1);
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len = r->end - r->start + 1;
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r2 = request_mem_region(r->start, len, r->name);
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if (!r2) {
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pr_err("Could not request memory region: "
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"start=%p, len=%d\n", (void *) r->start, len);
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ret = -EBUSY;
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goto fail;
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}
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regs_base = ioremap(r2->start, len);
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if (!regs_base) {
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pr_err("Could not ioremap: start=%p, len=%d\n",
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(void *) r2->start, len);
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ret = -EBUSY;
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goto fail_mem;
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}
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irq = platform_get_irq_byname(pdev, "secure_irq");
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if (irq < 0) {
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ret = -ENODEV;
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goto fail_io;
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}
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mb();
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if (GET_IDR(regs_base) == 0) {
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pr_err("Invalid IDR value detected\n");
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ret = -ENODEV;
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goto fail_io;
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}
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ret = request_irq(irq, msm_iommu_fault_handler, 0,
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"msm_iommu_secure_irpt_handler", drvdata);
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ret = clk_enable(iommu_clk);
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if (ret) {
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pr_err("Request IRQ %d failed with ret=%d\n", irq, ret);
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goto fail_io;
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clk_put(iommu_clk);
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goto fail_pclk;
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}
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} else
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iommu_clk = NULL;
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msm_iommu_reset(regs_base);
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drvdata->base = regs_base;
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drvdata->irq = irq;
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r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "physbase");
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nm2v = GET_NM2VCBMT((unsigned long) regs_base);
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ncb = GET_NCB((unsigned long) regs_base);
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if (!r) {
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ret = -ENODEV;
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goto fail_clk;
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}
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pr_info("device %s mapped at %p, irq %d with %d ctx banks\n",
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len = resource_size(r);
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r2 = request_mem_region(r->start, len, r->name);
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if (!r2) {
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pr_err("Could not request memory region: start=%p, len=%d\n",
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(void *) r->start, len);
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ret = -EBUSY;
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goto fail_clk;
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}
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regs_base = ioremap(r2->start, len);
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if (!regs_base) {
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pr_err("Could not ioremap: start=%p, len=%d\n",
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(void *) r2->start, len);
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ret = -EBUSY;
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goto fail_mem;
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}
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irq = platform_get_irq_byname(pdev, "secure_irq");
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if (irq < 0) {
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ret = -ENODEV;
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goto fail_io;
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}
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mb();
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if (GET_IDR(regs_base) == 0) {
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pr_err("Invalid IDR value detected\n");
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ret = -ENODEV;
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goto fail_io;
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}
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ret = request_irq(irq, msm_iommu_fault_handler, 0,
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"msm_iommu_secure_irpt_handler", drvdata);
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if (ret) {
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pr_err("Request IRQ %d failed with ret=%d\n", irq, ret);
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goto fail_io;
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}
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msm_iommu_reset(regs_base);
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drvdata->pclk = iommu_pclk;
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drvdata->clk = iommu_clk;
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drvdata->base = regs_base;
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drvdata->irq = irq;
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nm2v = GET_NM2VCBMT((unsigned long) regs_base);
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ncb = GET_NCB((unsigned long) regs_base);
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pr_info("device %s mapped at %p, irq %d with %d ctx banks\n",
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iommu_dev->name, regs_base, irq, ncb+1);
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platform_set_drvdata(pdev, drvdata);
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} else
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msm_iommu_root_dev = pdev;
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platform_set_drvdata(pdev, drvdata);
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if (iommu_clk)
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clk_disable(iommu_clk);
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clk_disable(iommu_pclk);
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return 0;
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fail_io:
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iounmap(regs_base);
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fail_mem:
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release_mem_region(r->start, len);
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fail_clk:
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if (iommu_clk) {
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clk_disable(iommu_clk);
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clk_put(iommu_clk);
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}
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fail_pclk:
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clk_disable(iommu_pclk);
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fail_enable:
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clk_put(iommu_pclk);
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fail:
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kfree(drvdata);
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return ret;
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@ -252,7 +270,10 @@ static int msm_iommu_remove(struct platform_device *pdev)
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drv = platform_get_drvdata(pdev);
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if (drv) {
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memset(drv, 0, sizeof(struct msm_iommu_drvdata));
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if (drv->clk)
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clk_put(drv->clk);
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clk_put(drv->pclk);
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memset(drv, 0, sizeof(*drv));
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kfree(drv);
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platform_set_drvdata(pdev, NULL);
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}
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@ -264,7 +285,7 @@ static int msm_iommu_ctx_probe(struct platform_device *pdev)
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struct msm_iommu_ctx_dev *c = pdev->dev.platform_data;
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struct msm_iommu_drvdata *drvdata;
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struct msm_iommu_ctx_drvdata *ctx_drvdata = NULL;
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int i, ret = 0;
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int i, ret;
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if (!c || !pdev->dev.parent) {
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ret = -EINVAL;
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goto fail;
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@ -288,6 +309,18 @@ static int msm_iommu_ctx_probe(struct platform_device *pdev)
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INIT_LIST_HEAD(&ctx_drvdata->attached_elm);
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platform_set_drvdata(pdev, ctx_drvdata);
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ret = clk_enable(drvdata->pclk);
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if (ret)
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goto fail;
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if (drvdata->clk) {
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ret = clk_enable(drvdata->clk);
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if (ret) {
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clk_disable(drvdata->pclk);
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goto fail;
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}
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}
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/* Program the M2V tables for this context */
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for (i = 0; i < MAX_NUM_MIDS; i++) {
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int mid = c->mids[i];
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@ -310,8 +343,11 @@ static int msm_iommu_ctx_probe(struct platform_device *pdev)
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SET_NSCFG(drvdata->base, mid, 3);
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}
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pr_info("context device %s with bank index %d\n", c->name, c->num);
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if (drvdata->clk)
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clk_disable(drvdata->clk);
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clk_disable(drvdata->pclk);
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dev_info(&pdev->dev, "context %s using bank %d\n", c->name, c->num);
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return 0;
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fail:
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kfree(ctx_drvdata);
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