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ixgbe: Fix cls_u32 offload support for L4 ports
Fix support for 16 bit source/dest port matches in ixgbe model. u32 uses a single 32-bit key value for both source and destination ports starting at offset 0. So replace the 2 functions with a single function that takes this key value/mask to program both source and dest ports. Verified with the following filter: #tc qdisc add dev p4p1 ingress #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1: u32 divisor 1 #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 800:0:10 u32 ht 800: link 1: \ offset at 0 mask 0f00 shift 6 plus 0 eat match ip protocol 6 ff #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:10 u32 ht 1: \ match tcp src 1024 ffff match tcp dst 80 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:11 u32 ht 1: \ match tcp src 1025 ffff action drop #tc filter add dev p4p1 parent ffff: protocol ip prio 99 \ handle 1:0:12 u32 ht 1: \ match tcp dst 81 ffff action drop Signed-off-by: Sridhar Samudrala <sridhar.samudrala@intel.com> Acked-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -64,28 +64,20 @@ static struct ixgbe_mat_field ixgbe_ipv4_fields[] = {
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{ .val = NULL } /* terminal node */
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};
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static inline int ixgbe_mat_prgm_sport(struct ixgbe_fdir_filter *input,
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static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input,
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union ixgbe_atr_input *mask,
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u32 val, u32 m)
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{
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input->filter.formatted.src_port = val & 0xffff;
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mask->formatted.src_port = m & 0xffff;
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return 0;
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};
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input->filter.formatted.dst_port = val >> 16;
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mask->formatted.dst_port = m >> 16;
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static inline int ixgbe_mat_prgm_dport(struct ixgbe_fdir_filter *input,
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union ixgbe_atr_input *mask,
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u32 val, u32 m)
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{
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input->filter.formatted.dst_port = val & 0xffff;
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mask->formatted.dst_port = m & 0xffff;
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return 0;
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};
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static struct ixgbe_mat_field ixgbe_tcp_fields[] = {
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{.off = 0, .val = ixgbe_mat_prgm_sport,
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.type = IXGBE_ATR_FLOW_TYPE_TCPV4},
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{.off = 2, .val = ixgbe_mat_prgm_dport,
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{.off = 0, .val = ixgbe_mat_prgm_ports,
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.type = IXGBE_ATR_FLOW_TYPE_TCPV4},
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{ .val = NULL } /* terminal node */
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};
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