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clk: davinci: pll-dm355: drop pll2_sysclk2
This removes pll2_sysclk2 from the TI DM355 clock driver. This SoC doesn't have such a clock. Also, SYSCLK_ALWAYS_ENABLED is transferred to pll2_sysclk1 since it drives the DDR and doesn't have another mechanism to keep it on. Reported-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: David Lechner <david@lechnology.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180525181150.17873-2-david@lechnology.com
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@ -62,8 +62,7 @@ static const struct davinci_pll_clk_info dm355_pll2_info = {
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PLL_POSTDIV_ALWAYS_ENABLED | PLL_POSTDIV_FIXED_DIV,
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};
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SYSCLK(1, pll2_sysclk1, pll2, 5, SYSCLK_FIXED_DIV);
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SYSCLK(2, pll2_sysclk2, pll2, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
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SYSCLK(1, pll2_sysclk1, pll2, 5, SYSCLK_FIXED_DIV | SYSCLK_ALWAYS_ENABLED);
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int dm355_pll2_init(struct device *dev, void __iomem *base)
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{
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@ -71,8 +70,6 @@ int dm355_pll2_init(struct device *dev, void __iomem *base)
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davinci_pll_sysclk_register(dev, &pll2_sysclk1, base);
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davinci_pll_sysclk_register(dev, &pll2_sysclk2, base);
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davinci_pll_sysclkbp_clk_register(dev, "pll2_sysclkbp", base);
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return 0;
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