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pinctrl: baytrail: Fix mingled clock pins
Fix plt clock 3, 4 and 5 pins, which were not in the proper order. Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -401,9 +401,9 @@ static const struct byt_simple_func_mux byt_score_sata_mux[] = {
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static const unsigned int byt_score_plt_clk0_pins[] = { 96 };
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static const unsigned int byt_score_plt_clk1_pins[] = { 97 };
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static const unsigned int byt_score_plt_clk2_pins[] = { 98 };
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static const unsigned int byt_score_plt_clk4_pins[] = { 99 };
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static const unsigned int byt_score_plt_clk5_pins[] = { 100 };
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static const unsigned int byt_score_plt_clk3_pins[] = { 101 };
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static const unsigned int byt_score_plt_clk3_pins[] = { 99 };
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static const unsigned int byt_score_plt_clk4_pins[] = { 100 };
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static const unsigned int byt_score_plt_clk5_pins[] = { 101 };
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static const struct byt_simple_func_mux byt_score_plt_clk_mux[] = {
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SIMPLE_FUNC("plt_clk", 1),
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};
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