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drm/bridge: tc358768: Clean up clock period code
The driver defines TC358768_PRECISION as 1000, and uses "nsk" to refer to clock periods. The original author does not remember where all this came from. Effectively the driver is using picoseconds as the unit for clock periods, yet referring to them by "nsk". Clean this up by just saying the periods are in picoseconds. Reviewed-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> # Asus TF700T Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Signed-off-by: Robert Foss <rfoss@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230906-tc358768-v4-10-31725f008a50@ideasonboard.com
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@ -15,6 +15,7 @@
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/units.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_drv.h>
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@ -627,15 +628,14 @@ static int tc358768_setup_pll(struct tc358768_priv *priv,
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return tc358768_clear_error(priv);
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}
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#define TC358768_PRECISION 1000
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static u32 tc358768_ns_to_cnt(u32 ns, u32 period_nsk)
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static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps)
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{
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return (ns * TC358768_PRECISION + period_nsk) / period_nsk;
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return (ns * 1000 + period_ps) / period_ps;
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}
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static u32 tc358768_to_ns(u32 nsk)
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static u32 tc358768_ps_to_ns(u32 ps)
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{
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return (nsk / TC358768_PRECISION);
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return ps / 1000;
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}
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static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
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@ -646,7 +646,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
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u32 val, val2, lptxcnt, hact, data_type;
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s32 raw_val;
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const struct drm_display_mode *mode;
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u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk;
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u32 hsbyteclk_ps, dsiclk_ps, ui_ps;
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u32 dsiclk, hsbyteclk, video_start;
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const u32 internal_delay = 40;
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int ret, i;
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@ -730,67 +730,65 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
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tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000);
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/* DSI Timings */
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hsbyteclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION,
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hsbyteclk);
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dsiclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk);
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ui_nsk = dsiclk_nsk / 2;
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dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk);
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dev_dbg(dev, "ui_nsk: %u\n", ui_nsk);
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dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk);
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hsbyteclk_ps = (u32)div_u64(PICO, hsbyteclk);
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dsiclk_ps = (u32)div_u64(PICO, dsiclk);
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ui_ps = dsiclk_ps / 2;
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dev_dbg(dev, "dsiclk: %u ps, ui %u ps, hsbyteclk %u ps\n", dsiclk_ps,
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ui_ps, hsbyteclk_ps);
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/* LP11 > 100us for D-PHY Rx Init */
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val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1;
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val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_ps) - 1;
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dev_dbg(dev, "LINEINITCNT: %u\n", val);
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tc358768_write(priv, TC358768_LINEINITCNT, val);
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/* LPTimeCnt > 50ns */
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val = tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1;
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val = tc358768_ns_to_cnt(50, hsbyteclk_ps) - 1;
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lptxcnt = val;
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dev_dbg(dev, "LPTXTIMECNT: %u\n", val);
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tc358768_write(priv, TC358768_LPTXTIMECNT, val);
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/* 38ns < TCLK_PREPARE < 95ns */
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val = tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1;
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val = tc358768_ns_to_cnt(65, hsbyteclk_ps) - 1;
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dev_dbg(dev, "TCLK_PREPARECNT %u\n", val);
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/* TCLK_PREPARE + TCLK_ZERO > 300ns */
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val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk),
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hsbyteclk_nsk) - 2;
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val2 = tc358768_ns_to_cnt(300 - tc358768_ps_to_ns(2 * ui_ps),
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hsbyteclk_ps) - 2;
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dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2);
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val |= val2 << 8;
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tc358768_write(priv, TC358768_TCLK_HEADERCNT, val);
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/* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */
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raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk_nsk) - 5;
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raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(2 * ui_ps), hsbyteclk_ps) - 5;
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val = clamp(raw_val, 0, 127);
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dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val);
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tc358768_write(priv, TC358768_TCLK_TRAILCNT, val);
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/* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */
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val = 50 + tc358768_to_ns(4 * ui_nsk);
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val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1;
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val = 50 + tc358768_ps_to_ns(4 * ui_ps);
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val = tc358768_ns_to_cnt(val, hsbyteclk_ps) - 1;
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dev_dbg(dev, "THS_PREPARECNT %u\n", val);
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/* THS_PREPARE + THS_ZERO > 145ns + 10*UI */
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raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbyteclk_nsk) - 10;
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raw_val = tc358768_ns_to_cnt(145 - tc358768_ps_to_ns(3 * ui_ps), hsbyteclk_ps) - 10;
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val2 = clamp(raw_val, 0, 127);
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dev_dbg(dev, "THS_ZEROCNT %u\n", val2);
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val |= val2 << 8;
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tc358768_write(priv, TC358768_THS_HEADERCNT, val);
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/* TWAKEUP > 1ms in lptxcnt steps */
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val = tc358768_ns_to_cnt(1020000, hsbyteclk_nsk);
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val = tc358768_ns_to_cnt(1020000, hsbyteclk_ps);
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val = val / (lptxcnt + 1) - 1;
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dev_dbg(dev, "TWAKEUP: %u\n", val);
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tc358768_write(priv, TC358768_TWAKEUP, val);
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/* TCLK_POSTCNT > 60ns + 52*UI */
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val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk),
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hsbyteclk_nsk) - 3;
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val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(52 * ui_ps),
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hsbyteclk_ps) - 3;
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dev_dbg(dev, "TCLK_POSTCNT: %u\n", val);
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tc358768_write(priv, TC358768_TCLK_POSTCNT, val);
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/* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */
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raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk),
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hsbyteclk_nsk) - 4;
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raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(18 * ui_ps),
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hsbyteclk_ps) - 4;
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val = clamp(raw_val, 0, 15);
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dev_dbg(dev, "THS_TRAILCNT: %u\n", val);
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tc358768_write(priv, TC358768_THS_TRAILCNT, val);
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@ -804,11 +802,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
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(mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0));
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/* TXTAGOCNT[26:16] RXTASURECNT[10:0] */
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val = tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk * 4);
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val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) / 4 - 1;
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val = tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps * 4);
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val = tc358768_ns_to_cnt(val, hsbyteclk_ps) / 4 - 1;
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dev_dbg(dev, "TXTAGOCNT: %u\n", val);
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val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk),
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hsbyteclk_nsk) - 2;
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val2 = tc358768_ns_to_cnt(tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps),
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hsbyteclk_ps) - 2;
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dev_dbg(dev, "RXTASURECNT: %u\n", val2);
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val = val << 16 | val2;
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tc358768_write(priv, TC358768_BTACNTRL1, val);
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