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pinctrl: renesas: r8a779h0: Add MSIOF pins, groups, functions
Add pins, groups and functions for the Clock-Synchronized Serial Interfaces with FIFO (MSIOF) on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/cbfc61f0c02e9dbeec0ea689e10bdd5ebf5bf1e3.1706264667.git.geert+renesas@glider.be
This commit is contained in:
Cong Dang
Geert Uytterhoeven
parent
2a9d0273d1
commit
b33c4b4b84
@ -1642,6 +1642,270 @@ static const unsigned int mmc_ds_mux[] = {
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MMC_DS_MARK,
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};
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_clk_pins[] = {
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/* MSIOF0_SCK */
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RCAR_GP_PIN(1, 10),
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};
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static const unsigned int msiof0_clk_mux[] = {
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MSIOF0_SCK_MARK,
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};
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static const unsigned int msiof0_sync_pins[] = {
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/* MSIOF0_SYNC */
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RCAR_GP_PIN(1, 8),
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};
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static const unsigned int msiof0_sync_mux[] = {
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MSIOF0_SYNC_MARK,
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};
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static const unsigned int msiof0_ss1_pins[] = {
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/* MSIOF0_SS1 */
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RCAR_GP_PIN(1, 7),
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};
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static const unsigned int msiof0_ss1_mux[] = {
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MSIOF0_SS1_MARK,
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};
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static const unsigned int msiof0_ss2_pins[] = {
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/* MSIOF0_SS2 */
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RCAR_GP_PIN(1, 6),
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};
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static const unsigned int msiof0_ss2_mux[] = {
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MSIOF0_SS2_MARK,
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};
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static const unsigned int msiof0_txd_pins[] = {
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/* MSIOF0_TXD */
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RCAR_GP_PIN(1, 9),
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};
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static const unsigned int msiof0_txd_mux[] = {
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MSIOF0_TXD_MARK,
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};
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static const unsigned int msiof0_rxd_pins[] = {
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/* MSIOF0_RXD */
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RCAR_GP_PIN(1, 11),
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};
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static const unsigned int msiof0_rxd_mux[] = {
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MSIOF0_RXD_MARK,
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};
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/* - MSIOF1 ----------------------------------------------------------------- */
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static const unsigned int msiof1_clk_pins[] = {
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/* MSIOF1_SCK */
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RCAR_GP_PIN(1, 3),
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};
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static const unsigned int msiof1_clk_mux[] = {
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MSIOF1_SCK_MARK,
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};
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static const unsigned int msiof1_sync_pins[] = {
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/* MSIOF1_SYNC */
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RCAR_GP_PIN(1, 2),
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};
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static const unsigned int msiof1_sync_mux[] = {
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MSIOF1_SYNC_MARK,
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};
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static const unsigned int msiof1_ss1_pins[] = {
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/* MSIOF1_SS1 */
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RCAR_GP_PIN(1, 1),
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};
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static const unsigned int msiof1_ss1_mux[] = {
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MSIOF1_SS1_MARK,
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};
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static const unsigned int msiof1_ss2_pins[] = {
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/* MSIOF1_SS2 */
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RCAR_GP_PIN(1, 0),
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};
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static const unsigned int msiof1_ss2_mux[] = {
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MSIOF1_SS2_MARK,
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};
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static const unsigned int msiof1_txd_pins[] = {
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/* MSIOF1_TXD */
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RCAR_GP_PIN(1, 4),
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};
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static const unsigned int msiof1_txd_mux[] = {
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MSIOF1_TXD_MARK,
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};
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static const unsigned int msiof1_rxd_pins[] = {
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/* MSIOF1_RXD */
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RCAR_GP_PIN(1, 5),
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};
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static const unsigned int msiof1_rxd_mux[] = {
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MSIOF1_RXD_MARK,
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};
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/* - MSIOF2 ----------------------------------------------------------------- */
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static const unsigned int msiof2_clk_pins[] = {
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/* MSIOF2_SCK */
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RCAR_GP_PIN(0, 17),
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};
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static const unsigned int msiof2_clk_mux[] = {
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MSIOF2_SCK_MARK,
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};
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static const unsigned int msiof2_sync_pins[] = {
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/* MSIOF2_SYNC */
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RCAR_GP_PIN(0, 15),
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};
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static const unsigned int msiof2_sync_mux[] = {
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MSIOF2_SYNC_MARK,
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};
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static const unsigned int msiof2_ss1_pins[] = {
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/* MSIOF2_SS1 */
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RCAR_GP_PIN(0, 14),
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};
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static const unsigned int msiof2_ss1_mux[] = {
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MSIOF2_SS1_MARK,
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};
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static const unsigned int msiof2_ss2_pins[] = {
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/* MSIOF2_SS2 */
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RCAR_GP_PIN(0, 13),
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};
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static const unsigned int msiof2_ss2_mux[] = {
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MSIOF2_SS2_MARK,
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};
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static const unsigned int msiof2_txd_pins[] = {
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/* MSIOF2_TXD */
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RCAR_GP_PIN(0, 16),
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};
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static const unsigned int msiof2_txd_mux[] = {
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MSIOF2_TXD_MARK,
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};
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static const unsigned int msiof2_rxd_pins[] = {
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/* MSIOF2_RXD */
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RCAR_GP_PIN(0, 18),
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};
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static const unsigned int msiof2_rxd_mux[] = {
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MSIOF2_RXD_MARK,
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};
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/* - MSIOF3 ----------------------------------------------------------------- */
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static const unsigned int msiof3_clk_pins[] = {
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/* MSIOF3_SCK */
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RCAR_GP_PIN(0, 3),
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};
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static const unsigned int msiof3_clk_mux[] = {
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MSIOF3_SCK_MARK,
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};
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static const unsigned int msiof3_sync_pins[] = {
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/* MSIOF3_SYNC */
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RCAR_GP_PIN(0, 6),
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};
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static const unsigned int msiof3_sync_mux[] = {
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MSIOF3_SYNC_MARK,
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};
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static const unsigned int msiof3_ss1_pins[] = {
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/* MSIOF3_SS1 */
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RCAR_GP_PIN(0, 1),
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};
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static const unsigned int msiof3_ss1_mux[] = {
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MSIOF3_SS1_MARK,
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};
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static const unsigned int msiof3_ss2_pins[] = {
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/* MSIOF3_SS2 */
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RCAR_GP_PIN(0, 2),
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};
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static const unsigned int msiof3_ss2_mux[] = {
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MSIOF3_SS2_MARK,
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};
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static const unsigned int msiof3_txd_pins[] = {
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/* MSIOF3_TXD */
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RCAR_GP_PIN(0, 4),
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};
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static const unsigned int msiof3_txd_mux[] = {
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MSIOF3_TXD_MARK,
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};
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static const unsigned int msiof3_rxd_pins[] = {
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/* MSIOF3_RXD */
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RCAR_GP_PIN(0, 5),
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};
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static const unsigned int msiof3_rxd_mux[] = {
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MSIOF3_RXD_MARK,
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};
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/* - MSIOF4 ----------------------------------------------------------------- */
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static const unsigned int msiof4_clk_pins[] = {
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/* MSIOF4_SCK */
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RCAR_GP_PIN(1, 25),
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};
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static const unsigned int msiof4_clk_mux[] = {
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MSIOF4_SCK_MARK,
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};
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static const unsigned int msiof4_sync_pins[] = {
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/* MSIOF4_SYNC */
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RCAR_GP_PIN(1, 28),
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};
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static const unsigned int msiof4_sync_mux[] = {
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MSIOF4_SYNC_MARK,
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};
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static const unsigned int msiof4_ss1_pins[] = {
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/* MSIOF4_SS1 */
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RCAR_GP_PIN(1, 23),
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};
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static const unsigned int msiof4_ss1_mux[] = {
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MSIOF4_SS1_MARK,
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};
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static const unsigned int msiof4_ss2_pins[] = {
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/* MSIOF4_SS2 */
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RCAR_GP_PIN(1, 24),
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};
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static const unsigned int msiof4_ss2_mux[] = {
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MSIOF4_SS2_MARK,
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};
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static const unsigned int msiof4_txd_pins[] = {
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/* MSIOF4_TXD */
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RCAR_GP_PIN(1, 26),
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};
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static const unsigned int msiof4_txd_mux[] = {
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MSIOF4_TXD_MARK,
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};
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static const unsigned int msiof4_rxd_pins[] = {
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/* MSIOF4_RXD */
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RCAR_GP_PIN(1, 27),
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};
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static const unsigned int msiof4_rxd_mux[] = {
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MSIOF4_RXD_MARK,
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};
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/* - MSIOF5 ----------------------------------------------------------------- */
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static const unsigned int msiof5_clk_pins[] = {
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/* MSIOF5_SCK */
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RCAR_GP_PIN(0, 11),
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};
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static const unsigned int msiof5_clk_mux[] = {
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MSIOF5_SCK_MARK,
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};
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static const unsigned int msiof5_sync_pins[] = {
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/* MSIOF5_SYNC */
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RCAR_GP_PIN(0, 9),
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};
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static const unsigned int msiof5_sync_mux[] = {
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MSIOF5_SYNC_MARK,
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};
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static const unsigned int msiof5_ss1_pins[] = {
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/* MSIOF5_SS1 */
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RCAR_GP_PIN(0, 8),
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};
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static const unsigned int msiof5_ss1_mux[] = {
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MSIOF5_SS1_MARK,
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};
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static const unsigned int msiof5_ss2_pins[] = {
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/* MSIOF5_SS2 */
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RCAR_GP_PIN(0, 7),
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};
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static const unsigned int msiof5_ss2_mux[] = {
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MSIOF5_SS2_MARK,
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};
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static const unsigned int msiof5_txd_pins[] = {
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/* MSIOF5_TXD */
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RCAR_GP_PIN(0, 10),
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};
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static const unsigned int msiof5_txd_mux[] = {
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MSIOF5_TXD_MARK,
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};
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static const unsigned int msiof5_rxd_pins[] = {
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/* MSIOF5_RXD */
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RCAR_GP_PIN(0, 12),
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};
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static const unsigned int msiof5_rxd_mux[] = {
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MSIOF5_RXD_MARK,
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};
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/* - QSPI0 ------------------------------------------------------------------ */
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static const unsigned int qspi0_ctrl_pins[] = {
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/* SPCLK, SSL */
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@ -1896,6 +2160,48 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(mmc_wp),
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SH_PFC_PIN_GROUP(mmc_ds),
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SH_PFC_PIN_GROUP(msiof0_clk),
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SH_PFC_PIN_GROUP(msiof0_sync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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SH_PFC_PIN_GROUP(msiof0_ss2),
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SH_PFC_PIN_GROUP(msiof0_txd),
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SH_PFC_PIN_GROUP(msiof0_rxd),
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SH_PFC_PIN_GROUP(msiof1_clk),
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SH_PFC_PIN_GROUP(msiof1_sync),
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SH_PFC_PIN_GROUP(msiof1_ss1),
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SH_PFC_PIN_GROUP(msiof1_ss2),
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SH_PFC_PIN_GROUP(msiof1_txd),
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SH_PFC_PIN_GROUP(msiof1_rxd),
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SH_PFC_PIN_GROUP(msiof2_clk),
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SH_PFC_PIN_GROUP(msiof2_sync),
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SH_PFC_PIN_GROUP(msiof2_ss1),
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SH_PFC_PIN_GROUP(msiof2_ss2),
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SH_PFC_PIN_GROUP(msiof2_txd),
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SH_PFC_PIN_GROUP(msiof2_rxd),
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SH_PFC_PIN_GROUP(msiof3_clk),
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SH_PFC_PIN_GROUP(msiof3_sync),
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SH_PFC_PIN_GROUP(msiof3_ss1),
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SH_PFC_PIN_GROUP(msiof3_ss2),
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SH_PFC_PIN_GROUP(msiof3_txd),
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SH_PFC_PIN_GROUP(msiof3_rxd),
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SH_PFC_PIN_GROUP(msiof4_clk),
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SH_PFC_PIN_GROUP(msiof4_sync),
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SH_PFC_PIN_GROUP(msiof4_ss1),
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SH_PFC_PIN_GROUP(msiof4_ss2),
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SH_PFC_PIN_GROUP(msiof4_txd),
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SH_PFC_PIN_GROUP(msiof4_rxd),
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SH_PFC_PIN_GROUP(msiof5_clk),
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SH_PFC_PIN_GROUP(msiof5_sync),
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SH_PFC_PIN_GROUP(msiof5_ss1),
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SH_PFC_PIN_GROUP(msiof5_ss2),
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SH_PFC_PIN_GROUP(msiof5_txd),
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SH_PFC_PIN_GROUP(msiof5_rxd),
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SH_PFC_PIN_GROUP(qspi0_ctrl),
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BUS_DATA_PIN_GROUP(qspi0_data, 2),
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BUS_DATA_PIN_GROUP(qspi0_data, 4),
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@ -2017,6 +2323,60 @@ static const char * const mmc_groups[] = {
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"mmc_ds",
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};
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static const char * const msiof0_groups[] = {
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"msiof0_clk",
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"msiof0_sync",
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"msiof0_ss1",
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"msiof0_ss2",
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"msiof0_txd",
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"msiof0_rxd",
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};
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static const char * const msiof1_groups[] = {
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"msiof1_clk",
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"msiof1_sync",
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"msiof1_ss1",
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"msiof1_ss2",
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"msiof1_txd",
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"msiof1_rxd",
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};
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static const char * const msiof2_groups[] = {
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"msiof2_clk",
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"msiof2_sync",
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"msiof2_ss1",
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"msiof2_ss2",
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"msiof2_txd",
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"msiof2_rxd",
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};
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static const char * const msiof3_groups[] = {
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"msiof3_clk",
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"msiof3_sync",
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"msiof3_ss1",
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"msiof3_ss2",
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"msiof3_txd",
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"msiof3_rxd",
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};
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static const char * const msiof4_groups[] = {
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"msiof4_clk",
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"msiof4_sync",
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"msiof4_ss1",
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"msiof4_ss2",
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"msiof4_txd",
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"msiof4_rxd",
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};
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static const char * const msiof5_groups[] = {
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"msiof5_clk",
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"msiof5_sync",
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"msiof5_ss1",
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"msiof5_ss2",
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"msiof5_txd",
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"msiof5_rxd",
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};
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static const char * const qspi0_groups[] = {
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"qspi0_ctrl",
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"qspi0_data2",
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@ -2084,6 +2444,13 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(mmc),
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SH_PFC_FUNCTION(msiof0),
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SH_PFC_FUNCTION(msiof1),
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SH_PFC_FUNCTION(msiof2),
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SH_PFC_FUNCTION(msiof3),
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SH_PFC_FUNCTION(msiof4),
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SH_PFC_FUNCTION(msiof5),
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SH_PFC_FUNCTION(qspi0),
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SH_PFC_FUNCTION(qspi1),
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