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First round of IIO fixes for the 4.14 cycle
Note this includes fixes from recent merge window. As such the tree is based on top of a prior staging/staging-next tree. * iio core - return and error for a failed read_reg debugfs call rather than eating the error. * ad7192 - Use the dedicated reset function in the ad_sigma_delta library instead of an spi transfer with the data on the stack which could cause problems with DMA. * ad7793 - Implement a dedicate reset function in the ad_sigma_delta library and use it to correctly reset this part. * bme280 - ctrl_reg write must occur after any register writes for updates to take effect. * mcp320x - negative voltage readout was broken. - Fix an oops on module unload due to spi_set_drvdata not being called in probe. * st_magn - Fix the data ready line configuration for the lis3mdl. It is not configurable so the st_magn core was assuming it didn't exist and so wasn't consuming interrupts resulting in an unhandled interrupt. * stm32-adc - off by one error on max channels checking. * stm32-timer - preset should not be buffered - reorganising register writes avoids this. - fix a corner case in which write preset goes wrong when a timer is used first as a trigger then as a counter with preset. Odd case but you never know. * ti-ads1015 - Fix setting of comparator polarity by fixing bitfield definition. * twl4030 - Error path handling fix to cleanup in event of regulator registration failure. - Disable the vusb3v1 regulator correctly in error handling - Don't paper over a regulator enable failure. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAlnH2PkRHGppYzIzQGtl cm5lbC5vcmcACgkQVIU0mcT0FoiNFw//XKT/CRq7R8Dg5vy4FT7NRw/SpSVH9u8M JsIISyAoh0jfOFJFkVv2Ll+Zs+SkbXJOPMUreaFJMnftSCkBdteT9D5kz5cYiUkO sFn58YEEqKCqQVJBEi0yM00HMxbpNKiNHXzo9WC8ZiUVRJqSigq1coznSqaZngRd yf4a9Z33jiH/NXalqy5Vb4CSn76UWpvvYJ11tuNxXqOldkyU4sm8bvsPWnBg1qG3 YIuVZs83Rv1HW0t6ktYf3WwC2rBhKEM8st2fUCLkU+4+foDuqQBiFdWJzTcxe6Ru 8za+q3ngOo7rRkLS8cSTsh8hbfKwIV0e3rQvsN3zqodqjPilw9uH3eybMYzLK/0I j9o12jaD1Ow7zQfiQnNnyJqDLddEt+f6GcrI/iYQPlTIQIhqDii4YInDyCrF4xbr i/8saOr5n4PsdHRovTUl2rrgiX+Jix6OmNLEtUdp1HWrc0XwbZ5L/1g6pXFL98QZ Kq8MwjNu+6x+66Hga/1fll19hZ/VMYGqxFtoP+6S28TS1bO9dXm6XNl5/U5Nh5mN J255UFCdFkBmJO9nP7tmbDscMCAbhc6AOHKxjUebuoNnyhyV+20W9S/gpzTIilnO Gv9D0z29zITc8Hpfhl2YKC6F00BuRAdPFJo05rSE/KoWX3bkPCiXFTfQ+aPwB72h bYT4oJeUoQg= =CcjQ -----END PGP SIGNATURE----- Merge tag 'iio-fixes-for-4.14a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus Jonathan writes: First round of IIO fixes for the 4.14 cycle Note this includes fixes from recent merge window. As such the tree is based on top of a prior staging/staging-next tree. * iio core - return and error for a failed read_reg debugfs call rather than eating the error. * ad7192 - Use the dedicated reset function in the ad_sigma_delta library instead of an spi transfer with the data on the stack which could cause problems with DMA. * ad7793 - Implement a dedicate reset function in the ad_sigma_delta library and use it to correctly reset this part. * bme280 - ctrl_reg write must occur after any register writes for updates to take effect. * mcp320x - negative voltage readout was broken. - Fix an oops on module unload due to spi_set_drvdata not being called in probe. * st_magn - Fix the data ready line configuration for the lis3mdl. It is not configurable so the st_magn core was assuming it didn't exist and so wasn't consuming interrupts resulting in an unhandled interrupt. * stm32-adc - off by one error on max channels checking. * stm32-timer - preset should not be buffered - reorganising register writes avoids this. - fix a corner case in which write preset goes wrong when a timer is used first as a trigger then as a counter with preset. Odd case but you never know. * ti-ads1015 - Fix setting of comparator polarity by fixing bitfield definition. * twl4030 - Error path handling fix to cleanup in event of regulator registration failure. - Disable the vusb3v1 regulator correctly in error handling - Don't paper over a regulator enable failure.
This commit is contained in:
commit
b2e312061c
@ -257,7 +257,7 @@ static int ad7793_setup(struct iio_dev *indio_dev,
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unsigned int vref_mv)
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{
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struct ad7793_state *st = iio_priv(indio_dev);
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int i, ret = -1;
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int i, ret;
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unsigned long long scale_uv;
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u32 id;
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@ -266,7 +266,7 @@ static int ad7793_setup(struct iio_dev *indio_dev,
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return ret;
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/* reset the serial interface */
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ret = spi_write(st->sd.spi, (u8 *)&ret, sizeof(ret));
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ret = ad_sd_reset(&st->sd, 32);
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if (ret < 0)
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goto out;
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usleep_range(500, 2000); /* Wait for at least 500us */
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@ -177,6 +177,34 @@ out:
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}
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EXPORT_SYMBOL_GPL(ad_sd_read_reg);
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/**
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* ad_sd_reset() - Reset the serial interface
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*
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* @sigma_delta: The sigma delta device
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* @reset_length: Number of SCLKs with DIN = 1
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*
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* Returns 0 on success, an error code otherwise.
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**/
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int ad_sd_reset(struct ad_sigma_delta *sigma_delta,
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unsigned int reset_length)
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{
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uint8_t *buf;
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unsigned int size;
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int ret;
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size = DIV_ROUND_UP(reset_length, 8);
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buf = kcalloc(size, sizeof(*buf), GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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memset(buf, 0xff, size);
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ret = spi_write(sigma_delta->spi, buf, size);
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kfree(buf);
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return ret;
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}
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EXPORT_SYMBOL_GPL(ad_sd_reset);
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static int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
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unsigned int mode, unsigned int channel)
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{
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@ -17,6 +17,8 @@
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* MCP3204
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* MCP3208
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* ------------
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* 13 bit converter
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* MCP3301
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*
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* Datasheet can be found here:
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* http://ww1.microchip.com/downloads/en/DeviceDoc/21293C.pdf mcp3001
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@ -96,7 +98,7 @@ static int mcp320x_channel_to_tx_data(int device_index,
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}
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static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
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bool differential, int device_index)
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bool differential, int device_index, int *val)
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{
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int ret;
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@ -117,19 +119,25 @@ static int mcp320x_adc_conversion(struct mcp320x *adc, u8 channel,
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switch (device_index) {
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case mcp3001:
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return (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
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*val = (adc->rx_buf[0] << 5 | adc->rx_buf[1] >> 3);
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return 0;
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case mcp3002:
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case mcp3004:
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case mcp3008:
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return (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
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*val = (adc->rx_buf[0] << 2 | adc->rx_buf[1] >> 6);
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return 0;
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case mcp3201:
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return (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
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*val = (adc->rx_buf[0] << 7 | adc->rx_buf[1] >> 1);
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return 0;
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case mcp3202:
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case mcp3204:
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case mcp3208:
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return (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
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*val = (adc->rx_buf[0] << 4 | adc->rx_buf[1] >> 4);
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return 0;
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case mcp3301:
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return sign_extend32((adc->rx_buf[0] & 0x1f) << 8 | adc->rx_buf[1], 12);
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*val = sign_extend32((adc->rx_buf[0] & 0x1f) << 8
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| adc->rx_buf[1], 12);
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return 0;
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default:
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return -EINVAL;
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}
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@ -150,12 +158,10 @@ static int mcp320x_read_raw(struct iio_dev *indio_dev,
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = mcp320x_adc_conversion(adc, channel->address,
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channel->differential, device_index);
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channel->differential, device_index, val);
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if (ret < 0)
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goto out;
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*val = ret;
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ret = IIO_VAL_INT;
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break;
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@ -312,6 +318,7 @@ static int mcp320x_probe(struct spi_device *spi)
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &mcp320x_info;
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spi_set_drvdata(spi, indio_dev);
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chip_info = &mcp320x_chip_infos[spi_get_device_id(spi)->driver_data];
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indio_dev->channels = chip_info->channels;
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@ -1666,7 +1666,7 @@ static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
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num_channels = of_property_count_u32_elems(node, "st,adc-channels");
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if (num_channels < 0 ||
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num_channels >= adc_info->max_channels) {
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num_channels > adc_info->max_channels) {
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dev_err(&indio_dev->dev, "Bad st,adc-channels?\n");
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return num_channels < 0 ? num_channels : -EINVAL;
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}
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@ -52,7 +52,7 @@
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#define ADS1015_CFG_COMP_QUE_MASK GENMASK(1, 0)
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#define ADS1015_CFG_COMP_LAT_MASK BIT(2)
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#define ADS1015_CFG_COMP_POL_MASK BIT(2)
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#define ADS1015_CFG_COMP_POL_MASK BIT(3)
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#define ADS1015_CFG_COMP_MODE_MASK BIT(4)
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#define ADS1015_CFG_DR_MASK GENMASK(7, 5)
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#define ADS1015_CFG_MOD_MASK BIT(8)
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@ -1017,10 +1017,12 @@ static int ads1015_probe(struct i2c_client *client,
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switch (irq_trig) {
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case IRQF_TRIGGER_LOW:
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cfg_comp |= ADS1015_CFG_COMP_POL_LOW;
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cfg_comp |= ADS1015_CFG_COMP_POL_LOW <<
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ADS1015_CFG_COMP_POL_SHIFT;
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break;
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case IRQF_TRIGGER_HIGH:
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cfg_comp |= ADS1015_CFG_COMP_POL_HIGH;
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cfg_comp |= ADS1015_CFG_COMP_POL_HIGH <<
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ADS1015_CFG_COMP_POL_SHIFT;
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break;
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default:
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return -EINVAL;
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@ -887,21 +887,27 @@ static int twl4030_madc_probe(struct platform_device *pdev)
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/* Enable 3v1 bias regulator for MADC[3:6] */
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madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
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if (IS_ERR(madc->usb3v1))
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return -ENODEV;
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if (IS_ERR(madc->usb3v1)) {
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ret = -ENODEV;
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goto err_i2c;
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}
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ret = regulator_enable(madc->usb3v1);
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if (ret)
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if (ret) {
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dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
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goto err_i2c;
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}
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ret = iio_device_register(iio_dev);
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if (ret) {
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dev_err(&pdev->dev, "could not register iio device\n");
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goto err_i2c;
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goto err_usb3v1;
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}
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return 0;
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err_usb3v1:
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regulator_disable(madc->usb3v1);
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err_i2c:
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twl4030_madc_set_current_generator(madc, 0, 0);
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err_current_generator:
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@ -463,8 +463,17 @@ int st_sensors_set_dataready_irq(struct iio_dev *indio_dev, bool enable)
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u8 drdy_mask;
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struct st_sensor_data *sdata = iio_priv(indio_dev);
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if (!sdata->sensor_settings->drdy_irq.addr)
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if (!sdata->sensor_settings->drdy_irq.addr) {
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/*
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* there are some devices (e.g. LIS3MDL) where drdy line is
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* routed to a given pin and it is not possible to select a
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* different one. Take into account irq status register
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* to understand if irq trigger can be properly supported
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*/
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if (sdata->sensor_settings->drdy_irq.addr_stat_drdy)
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sdata->hw_irq_trigger = enable;
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return 0;
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}
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/* Enable/Disable the interrupt generator 1. */
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if (sdata->sensor_settings->drdy_irq.ig1.en_addr > 0) {
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@ -310,8 +310,10 @@ static ssize_t iio_debugfs_read_reg(struct file *file, char __user *userbuf,
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ret = indio_dev->info->debugfs_reg_access(indio_dev,
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indio_dev->cached_reg_addr,
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0, &val);
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if (ret)
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if (ret) {
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dev_err(indio_dev->dev.parent, "%s: read failed\n", __func__);
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return ret;
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}
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len = snprintf(buf, sizeof(buf), "0x%X\n", val);
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@ -315,6 +315,10 @@ static const struct st_sensor_settings st_magn_sensors_settings[] = {
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},
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},
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},
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.drdy_irq = {
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/* drdy line is routed drdy pin */
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.addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR,
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},
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.multi_read_bit = true,
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.bootime = 2,
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},
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@ -573,7 +573,7 @@ static int bmp280_chip_config(struct bmp280_data *data)
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u8 osrs = BMP280_OSRS_TEMP_X(data->oversampling_temp + 1) |
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BMP280_OSRS_PRESS_X(data->oversampling_press + 1);
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ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_MEAS,
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ret = regmap_write_bits(data->regmap, BMP280_REG_CTRL_MEAS,
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BMP280_OSRS_TEMP_MASK |
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BMP280_OSRS_PRESS_MASK |
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BMP280_MODE_MASK,
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@ -174,6 +174,7 @@ static void stm32_timer_stop(struct stm32_timer_trigger *priv)
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clk_disable(priv->clk);
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/* Stop timer */
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0);
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regmap_write(priv->regmap, TIM_PSC, 0);
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regmap_write(priv->regmap, TIM_ARR, 0);
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@ -715,8 +716,9 @@ static ssize_t stm32_count_set_preset(struct iio_dev *indio_dev,
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if (ret)
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return ret;
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/* TIMx_ARR register shouldn't be buffered (ARPE=0) */
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
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regmap_write(priv->regmap, TIM_ARR, preset);
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regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
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return len;
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}
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@ -223,11 +223,9 @@ static int ad7192_setup(struct ad7192_state *st,
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struct iio_dev *indio_dev = spi_get_drvdata(st->sd.spi);
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unsigned long long scale_uv;
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int i, ret, id;
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u8 ones[6];
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/* reset the serial interface */
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memset(&ones, 0xFF, 6);
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ret = spi_write(st->sd.spi, &ones, 6);
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ret = ad_sd_reset(&st->sd, 48);
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if (ret < 0)
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goto out;
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usleep_range(500, 1000); /* Wait for at least 500us */
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@ -111,6 +111,9 @@ int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
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int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
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unsigned int size, unsigned int *val);
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int ad_sd_reset(struct ad_sigma_delta *sigma_delta,
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unsigned int reset_length);
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int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, int *val);
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int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
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