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powerpc/powernv/vas: Define helpers to init window context
Define helpers to initialize window context registers of the VAS hardware. These will be used in follow-on patches when opening/closing VAS windows. Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Sukadev Bhattiprolu
Michael Ellerman
parent
180fe15a82
commit
b25b33ac18
@ -13,6 +13,7 @@
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/log2.h>
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#include "vas.h"
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@ -186,6 +187,304 @@ int map_winctx_mmio_bars(struct vas_window *window)
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return 0;
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}
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/*
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* Reset all valid registers in the HV and OS/User Window Contexts for
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* the window identified by @window.
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*
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* NOTE: We cannot really use a for loop to reset window context. Not all
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* offsets in a window context are valid registers and the valid
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* registers are not sequential. And, we can only write to offsets
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* with valid registers.
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*/
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void reset_window_regs(struct vas_window *window)
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{
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write_hvwc_reg(window, VREG(LPID), 0ULL);
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write_hvwc_reg(window, VREG(PID), 0ULL);
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write_hvwc_reg(window, VREG(XLATE_MSR), 0ULL);
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write_hvwc_reg(window, VREG(XLATE_LPCR), 0ULL);
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write_hvwc_reg(window, VREG(XLATE_CTL), 0ULL);
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write_hvwc_reg(window, VREG(AMR), 0ULL);
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write_hvwc_reg(window, VREG(SEIDR), 0ULL);
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write_hvwc_reg(window, VREG(FAULT_TX_WIN), 0ULL);
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write_hvwc_reg(window, VREG(OSU_INTR_SRC_RA), 0ULL);
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write_hvwc_reg(window, VREG(HV_INTR_SRC_RA), 0ULL);
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write_hvwc_reg(window, VREG(PSWID), 0ULL);
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write_hvwc_reg(window, VREG(LFIFO_BAR), 0ULL);
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write_hvwc_reg(window, VREG(LDATA_STAMP_CTL), 0ULL);
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write_hvwc_reg(window, VREG(LDMA_CACHE_CTL), 0ULL);
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write_hvwc_reg(window, VREG(LRFIFO_PUSH), 0ULL);
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write_hvwc_reg(window, VREG(CURR_MSG_COUNT), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_AFTER_COUNT), 0ULL);
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write_hvwc_reg(window, VREG(LRX_WCRED), 0ULL);
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write_hvwc_reg(window, VREG(LRX_WCRED_ADDER), 0ULL);
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write_hvwc_reg(window, VREG(TX_WCRED), 0ULL);
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write_hvwc_reg(window, VREG(TX_WCRED_ADDER), 0ULL);
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write_hvwc_reg(window, VREG(LFIFO_SIZE), 0ULL);
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write_hvwc_reg(window, VREG(WINCTL), 0ULL);
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write_hvwc_reg(window, VREG(WIN_STATUS), 0ULL);
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write_hvwc_reg(window, VREG(WIN_CTX_CACHING_CTL), 0ULL);
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write_hvwc_reg(window, VREG(TX_RSVD_BUF_COUNT), 0ULL);
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write_hvwc_reg(window, VREG(LRFIFO_WIN_PTR), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_CTL), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_PID), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_LPID), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_TID), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_SCOPE), 0ULL);
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write_hvwc_reg(window, VREG(NX_UTIL_ADDER), 0ULL);
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/* Skip read-only registers: NX_UTIL and NX_UTIL_SE */
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/*
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* The send and receive window credit adder registers are also
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* accessible from HVWC and have been initialized above. We don't
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* need to initialize from the OS/User Window Context, so skip
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* following calls:
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*
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* write_uwc_reg(window, VREG(TX_WCRED_ADDER), 0ULL);
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* write_uwc_reg(window, VREG(LRX_WCRED_ADDER), 0ULL);
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*/
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}
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/*
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* Initialize window context registers related to Address Translation.
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* These registers are common to send/receive windows although they
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* differ for user/kernel windows. As we resolve the TODOs we may
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* want to add fields to vas_winctx and move the initialization to
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* init_vas_winctx_regs().
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*/
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static void init_xlate_regs(struct vas_window *window, bool user_win)
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{
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u64 lpcr, val;
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/*
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* MSR_TA, MSR_US are false for both kernel and user.
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* MSR_DR and MSR_PR are false for kernel.
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*/
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val = 0ULL;
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val = SET_FIELD(VAS_XLATE_MSR_HV, val, 1);
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val = SET_FIELD(VAS_XLATE_MSR_SF, val, 1);
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if (user_win) {
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val = SET_FIELD(VAS_XLATE_MSR_DR, val, 1);
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val = SET_FIELD(VAS_XLATE_MSR_PR, val, 1);
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}
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write_hvwc_reg(window, VREG(XLATE_MSR), val);
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lpcr = mfspr(SPRN_LPCR);
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val = 0ULL;
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/*
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* NOTE: From Section 5.7.8.1 Segment Lookaside Buffer of the
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* Power ISA, v3.0B, Page size encoding is 0 = 4KB, 5 = 64KB.
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*
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* NOTE: From Section 1.3.1, Address Translation Context of the
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* Nest MMU Workbook, LPCR_SC should be 0 for Power9.
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*/
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val = SET_FIELD(VAS_XLATE_LPCR_PAGE_SIZE, val, 5);
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val = SET_FIELD(VAS_XLATE_LPCR_ISL, val, lpcr & LPCR_ISL);
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val = SET_FIELD(VAS_XLATE_LPCR_TC, val, lpcr & LPCR_TC);
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val = SET_FIELD(VAS_XLATE_LPCR_SC, val, 0);
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write_hvwc_reg(window, VREG(XLATE_LPCR), val);
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/*
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* Section 1.3.1 (Address translation Context) of NMMU workbook.
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* 0b00 Hashed Page Table mode
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* 0b01 Reserved
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* 0b10 Radix on HPT
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* 0b11 Radix on Radix
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*/
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val = 0ULL;
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val = SET_FIELD(VAS_XLATE_MODE, val, radix_enabled() ? 3 : 2);
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write_hvwc_reg(window, VREG(XLATE_CTL), val);
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/*
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* TODO: Can we mfspr(AMR) even for user windows?
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*/
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val = 0ULL;
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val = SET_FIELD(VAS_AMR, val, mfspr(SPRN_AMR));
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write_hvwc_reg(window, VREG(AMR), val);
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val = 0ULL;
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val = SET_FIELD(VAS_SEIDR, val, 0);
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write_hvwc_reg(window, VREG(SEIDR), val);
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}
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/*
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* Initialize Reserved Send Buffer Count for the send window. It involves
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* writing to the register, reading it back to confirm that the hardware
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* has enough buffers to reserve. See section 1.3.1.2.1 of VAS workbook.
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*
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* Since we can only make a best-effort attempt to fulfill the request,
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* we don't return any errors if we cannot.
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*
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* TODO: Reserved (aka dedicated) send buffers are not supported yet.
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*/
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static void init_rsvd_tx_buf_count(struct vas_window *txwin,
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struct vas_winctx *winctx)
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{
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write_hvwc_reg(txwin, VREG(TX_RSVD_BUF_COUNT), 0ULL);
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}
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/*
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* init_winctx_regs()
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* Initialize window context registers for a receive window.
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* Except for caching control and marking window open, the registers
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* are initialized in the order listed in Section 3.1.4 (Window Context
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* Cache Register Details) of the VAS workbook although they don't need
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* to be.
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*
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* Design note: For NX receive windows, NX allocates the FIFO buffer in OPAL
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* (so that it can get a large contiguous area) and passes that buffer
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* to kernel via device tree. We now write that buffer address to the
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* FIFO BAR. Would it make sense to do this all in OPAL? i.e have OPAL
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* write the per-chip RX FIFO addresses to the windows during boot-up
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* as a one-time task? That could work for NX but what about other
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* receivers? Let the receivers tell us the rx-fifo buffers for now.
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*/
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int init_winctx_regs(struct vas_window *window, struct vas_winctx *winctx)
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{
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u64 val;
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int fifo_size;
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reset_window_regs(window);
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val = 0ULL;
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val = SET_FIELD(VAS_LPID, val, winctx->lpid);
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write_hvwc_reg(window, VREG(LPID), val);
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val = 0ULL;
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val = SET_FIELD(VAS_PID_ID, val, winctx->pidr);
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write_hvwc_reg(window, VREG(PID), val);
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init_xlate_regs(window, winctx->user_win);
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val = 0ULL;
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val = SET_FIELD(VAS_FAULT_TX_WIN, val, 0);
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write_hvwc_reg(window, VREG(FAULT_TX_WIN), val);
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/* In PowerNV, interrupts go to HV. */
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write_hvwc_reg(window, VREG(OSU_INTR_SRC_RA), 0ULL);
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val = 0ULL;
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val = SET_FIELD(VAS_HV_INTR_SRC_RA, val, winctx->irq_port);
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write_hvwc_reg(window, VREG(HV_INTR_SRC_RA), val);
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val = 0ULL;
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val = SET_FIELD(VAS_PSWID_EA_HANDLE, val, winctx->pswid);
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write_hvwc_reg(window, VREG(PSWID), val);
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write_hvwc_reg(window, VREG(SPARE1), 0ULL);
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write_hvwc_reg(window, VREG(SPARE2), 0ULL);
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write_hvwc_reg(window, VREG(SPARE3), 0ULL);
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/*
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* NOTE: VAS expects the FIFO address to be copied into the LFIFO_BAR
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* register as is - do NOT shift the address into VAS_LFIFO_BAR
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* bit fields! Ok to set the page migration select fields -
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* VAS ignores the lower 10+ bits in the address anyway, because
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* the minimum FIFO size is 1K?
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*
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* See also: Design note in function header.
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*/
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val = __pa(winctx->rx_fifo);
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val = SET_FIELD(VAS_PAGE_MIGRATION_SELECT, val, 0);
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write_hvwc_reg(window, VREG(LFIFO_BAR), val);
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val = 0ULL;
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val = SET_FIELD(VAS_LDATA_STAMP, val, winctx->data_stamp);
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write_hvwc_reg(window, VREG(LDATA_STAMP_CTL), val);
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val = 0ULL;
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val = SET_FIELD(VAS_LDMA_TYPE, val, winctx->dma_type);
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val = SET_FIELD(VAS_LDMA_FIFO_DISABLE, val, winctx->fifo_disable);
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write_hvwc_reg(window, VREG(LDMA_CACHE_CTL), val);
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write_hvwc_reg(window, VREG(LRFIFO_PUSH), 0ULL);
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write_hvwc_reg(window, VREG(CURR_MSG_COUNT), 0ULL);
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write_hvwc_reg(window, VREG(LNOTIFY_AFTER_COUNT), 0ULL);
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val = 0ULL;
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val = SET_FIELD(VAS_LRX_WCRED, val, winctx->wcreds_max);
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write_hvwc_reg(window, VREG(LRX_WCRED), val);
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val = 0ULL;
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val = SET_FIELD(VAS_TX_WCRED, val, winctx->wcreds_max);
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write_hvwc_reg(window, VREG(TX_WCRED), val);
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write_hvwc_reg(window, VREG(LRX_WCRED_ADDER), 0ULL);
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write_hvwc_reg(window, VREG(TX_WCRED_ADDER), 0ULL);
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fifo_size = winctx->rx_fifo_size / 1024;
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val = 0ULL;
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val = SET_FIELD(VAS_LFIFO_SIZE, val, ilog2(fifo_size));
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write_hvwc_reg(window, VREG(LFIFO_SIZE), val);
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/* Update window control and caching control registers last so
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* we mark the window open only after fully initializing it and
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* pushing context to cache.
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*/
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write_hvwc_reg(window, VREG(WIN_STATUS), 0ULL);
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init_rsvd_tx_buf_count(window, winctx);
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/* for a send window, point to the matching receive window */
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val = 0ULL;
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val = SET_FIELD(VAS_LRX_WIN_ID, val, winctx->rx_win_id);
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write_hvwc_reg(window, VREG(LRFIFO_WIN_PTR), val);
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write_hvwc_reg(window, VREG(SPARE4), 0ULL);
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val = 0ULL;
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val = SET_FIELD(VAS_NOTIFY_DISABLE, val, winctx->notify_disable);
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val = SET_FIELD(VAS_INTR_DISABLE, val, winctx->intr_disable);
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val = SET_FIELD(VAS_NOTIFY_EARLY, val, winctx->notify_early);
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val = SET_FIELD(VAS_NOTIFY_OSU_INTR, val, winctx->notify_os_intr_reg);
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write_hvwc_reg(window, VREG(LNOTIFY_CTL), val);
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val = 0ULL;
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val = SET_FIELD(VAS_LNOTIFY_PID, val, winctx->lnotify_pid);
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write_hvwc_reg(window, VREG(LNOTIFY_PID), val);
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val = 0ULL;
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val = SET_FIELD(VAS_LNOTIFY_LPID, val, winctx->lnotify_lpid);
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write_hvwc_reg(window, VREG(LNOTIFY_LPID), val);
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val = 0ULL;
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val = SET_FIELD(VAS_LNOTIFY_TID, val, winctx->lnotify_tid);
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write_hvwc_reg(window, VREG(LNOTIFY_TID), val);
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val = 0ULL;
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val = SET_FIELD(VAS_LNOTIFY_MIN_SCOPE, val, winctx->min_scope);
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val = SET_FIELD(VAS_LNOTIFY_MAX_SCOPE, val, winctx->max_scope);
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write_hvwc_reg(window, VREG(LNOTIFY_SCOPE), val);
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/* Skip read-only registers NX_UTIL and NX_UTIL_SE */
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write_hvwc_reg(window, VREG(SPARE5), 0ULL);
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write_hvwc_reg(window, VREG(NX_UTIL_ADDER), 0ULL);
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write_hvwc_reg(window, VREG(SPARE6), 0ULL);
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/* Finally, push window context to memory and... */
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val = 0ULL;
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val = SET_FIELD(VAS_PUSH_TO_MEM, val, 1);
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write_hvwc_reg(window, VREG(WIN_CTX_CACHING_CTL), val);
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/* ... mark the window open for business */
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val = 0ULL;
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val = SET_FIELD(VAS_WINCTL_REJ_NO_CREDIT, val, winctx->rej_no_credit);
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val = SET_FIELD(VAS_WINCTL_PIN, val, winctx->pin_win);
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val = SET_FIELD(VAS_WINCTL_TX_WCRED_MODE, val, winctx->tx_wcred_mode);
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val = SET_FIELD(VAS_WINCTL_RX_WCRED_MODE, val, winctx->rx_wcred_mode);
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val = SET_FIELD(VAS_WINCTL_TX_WORD_MODE, val, winctx->tx_word_mode);
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val = SET_FIELD(VAS_WINCTL_RX_WORD_MODE, val, winctx->rx_word_mode);
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val = SET_FIELD(VAS_WINCTL_FAULT_WIN, val, winctx->fault_win);
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val = SET_FIELD(VAS_WINCTL_NX_WIN, val, winctx->nx_win);
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val = SET_FIELD(VAS_WINCTL_OPEN, val, 1);
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write_hvwc_reg(window, VREG(WINCTL), val);
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return 0;
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}
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/* stub for now */
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int vas_win_close(struct vas_window *window)
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{
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@ -12,6 +12,7 @@
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#include <linux/atomic.h>
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#include <linux/idr.h>
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#include <asm/vas.h>
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#include <linux/io.h>
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/*
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* Overview of Virtual Accelerator Switchboard (VAS).
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@ -381,4 +382,58 @@ struct vas_winctx {
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extern struct vas_instance *find_vas_instance(int vasid);
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/*
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* VREG(x):
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* Expand a register's short name (eg: LPID) into two parameters:
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* - the register's short name in string form ("LPID"), and
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* - the name of the macro (eg: VAS_LPID_OFFSET), defining the
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* register's offset in the window context
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*/
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#define VREG_SFX(n, s) __stringify(n), VAS_##n##s
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#define VREG(r) VREG_SFX(r, _OFFSET)
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#ifdef vas_debug
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static inline void vas_log_write(struct vas_window *win, char *name,
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void *regptr, u64 val)
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{
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if (val)
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pr_err("%swin #%d: %s reg %p, val 0x%016llx\n",
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win->tx_win ? "Tx" : "Rx", win->winid, name,
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regptr, val);
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}
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#else /* vas_debug */
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#define vas_log_write(win, name, reg, val)
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#endif /* vas_debug */
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static inline void write_uwc_reg(struct vas_window *win, char *name,
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s32 reg, u64 val)
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{
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void *regptr;
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regptr = win->uwc_map + reg;
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vas_log_write(win, name, regptr, val);
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out_be64(regptr, val);
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}
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static inline void write_hvwc_reg(struct vas_window *win, char *name,
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s32 reg, u64 val)
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{
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void *regptr;
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regptr = win->hvwc_map + reg;
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vas_log_write(win, name, regptr, val);
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out_be64(regptr, val);
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}
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static inline u64 read_hvwc_reg(struct vas_window *win,
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char *name __maybe_unused, s32 reg)
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{
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return in_be64(win->hvwc_map+reg);
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}
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#endif /* _VAS_H */
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