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thunderbolt: Add helper to check if CL states are enabled on port
We will need this when enabling lane margining support. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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@ -1330,6 +1330,34 @@ static int tb_port_clx_enable(struct tb_port *port, enum tb_clx clx)
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return __tb_port_clx_set(port, clx, true);
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}
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/**
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* tb_port_is_clx_enabled() - Is given CL state enabled
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* @port: USB4 port to check
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* @clx_mask: Mask of CL states to check
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*
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* Returns true if any of the given CL states is enabled for @port.
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*/
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bool tb_port_is_clx_enabled(struct tb_port *port, unsigned int clx_mask)
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{
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u32 val, mask = 0;
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int ret;
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if (!tb_port_clx_supported(port, clx_mask))
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return false;
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if (clx_mask & TB_CL1)
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mask |= LANE_ADP_CS_1_CL0S_ENABLE | LANE_ADP_CS_1_CL1_ENABLE;
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if (clx_mask & TB_CL2)
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mask |= LANE_ADP_CS_1_CL2_ENABLE;
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ret = tb_port_read(port, &val, TB_CFG_PORT,
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port->cap_phy + LANE_ADP_CS_1, 1);
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if (ret)
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return false;
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return !!(val & mask);
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}
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static int tb_port_start_lane_initialization(struct tb_port *port)
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{
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int ret;
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@ -1035,6 +1035,7 @@ void tb_port_lane_bonding_disable(struct tb_port *port);
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int tb_port_wait_for_link_width(struct tb_port *port, int width,
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int timeout_msec);
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int tb_port_update_credits(struct tb_port *port);
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bool tb_port_is_clx_enabled(struct tb_port *port, enum tb_clx clx);
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int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
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int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
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@ -334,6 +334,7 @@ struct tb_regs_port_header {
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#define LANE_ADP_CS_1_TARGET_WIDTH_DUAL 0x3
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#define LANE_ADP_CS_1_CL0S_ENABLE BIT(10)
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#define LANE_ADP_CS_1_CL1_ENABLE BIT(11)
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#define LANE_ADP_CS_1_CL2_ENABLE BIT(12)
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#define LANE_ADP_CS_1_LD BIT(14)
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#define LANE_ADP_CS_1_LB BIT(15)
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#define LANE_ADP_CS_1_CURRENT_SPEED_MASK GENMASK(19, 16)
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