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Merge branch 'pci/shane-amd-ahci-i2c' into next
* pci/shane-amd-ahci-i2c: i2c-piix4: Add AMD CZ SMBus device ID ahci: Add AMD CZ SATA device ID PCI: Put Hudson-2 device IDs together
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commit
b1267d60ce
@ -13,7 +13,7 @@ Supported adapters:
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* AMD SP5100 (SB700 derivative found on some server mainboards)
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Datasheet: Publicly available at the AMD website
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http://support.amd.com/us/Embedded_TechDocs/44413.pdf
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* AMD Hudson-2
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* AMD Hudson-2, CZ
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Datasheet: Not publicly available
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* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
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Datasheet: Publicly available at the SMSC website http://www.smsc.com
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@ -310,6 +310,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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/* AMD */
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{ PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
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{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
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/* AMD is using RAID class only for ahci controllers */
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{ PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
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@ -150,6 +150,7 @@ config I2C_PIIX4
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ATI SB700/SP5100
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ATI SB800
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AMD Hudson-2
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AMD CZ
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Serverworks OSB4
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Serverworks CSB5
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Serverworks CSB6
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@ -22,7 +22,7 @@
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Intel PIIX4, 440MX
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Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
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ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
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AMD Hudson-2
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AMD Hudson-2, CZ
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SMSC Victory66
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Note: we assume there can only be one device, with one or more
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@ -522,6 +522,7 @@ static DEFINE_PCI_DEVICE_TABLE(piix4_ids) = {
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x790b) },
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{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
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PCI_DEVICE_ID_SERVERWORKS_OSB4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
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@ -1022,6 +1022,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, 0x7900, quirk_amd_ide_mode);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, 0x7900, quirk_amd_ide_mode);
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/*
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* Serverworks CSB5 IDE does not fully support native mode
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@ -556,7 +556,6 @@
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#define PCI_DEVICE_ID_AMD_8131_BRIDGE 0x7450
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#define PCI_DEVICE_ID_AMD_8131_APIC 0x7451
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#define PCI_DEVICE_ID_AMD_8132_BRIDGE 0x7458
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#define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b
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#define PCI_DEVICE_ID_AMD_CS5535_IDE 0x208F
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#define PCI_DEVICE_ID_AMD_CS5536_ISA 0x2090
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#define PCI_DEVICE_ID_AMD_CS5536_FLASH 0x2091
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@ -568,8 +567,9 @@
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#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A
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#define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081
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#define PCI_DEVICE_ID_AMD_LX_AES 0x2082
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#define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c
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#define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE 0x7800
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#define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b
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#define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c
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#define PCI_VENDOR_ID_TRIDENT 0x1023
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#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000
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