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[WATCHDOG] max63xx: be careful when disabling the watchdog
When shutting down the watchdog timer, special care must be taken not to overwrite other bits in the register, as it may be shared with other peripherals. For example, on the Arcom Vulcan, the register is shared between the watchdog and the PCI reset line... Signed-off-by: Marc Zyngier <maz@misterjones.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -154,9 +154,14 @@ static void max63xx_wdt_enable(struct max63xx_timeout *entry)
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static void max63xx_wdt_disable(void)
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static void max63xx_wdt_disable(void)
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{
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{
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u8 val;
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spin_lock(&io_lock);
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spin_lock(&io_lock);
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__raw_writeb(3, wdt_base);
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val = __raw_readb(wdt_base);
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val &= ~MAX6369_WDSET;
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val |= 3;
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__raw_writeb(val, wdt_base);
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spin_unlock(&io_lock);
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spin_unlock(&io_lock);
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