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net: dsa: mv88e6xxx: add set_switch_mac to ops
Add a set_switch_mac chip-wide function to mv88e6xxx_ops and remove MV88E6XXX_FLAG_G2_SWITCH_MAC flags. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2909,14 +2909,11 @@ static int mv88e6xxx_set_addr(struct dsa_switch *ds, u8 *addr)
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struct mv88e6xxx_chip *chip = ds->priv;
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int err;
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if (!chip->info->ops->set_switch_mac)
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return -EOPNOTSUPP;
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mutex_lock(&chip->reg_lock);
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/* Has an indirect Switch MAC/WoL/WoF register in Global 2? */
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if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_G2_SWITCH_MAC))
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err = mv88e6xxx_g2_set_switch_mac(chip, addr);
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else
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err = mv88e6xxx_g1_set_switch_mac(chip, addr);
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err = chip->info->ops->set_switch_mac(chip, addr);
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mutex_unlock(&chip->reg_lock);
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return err;
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@ -3210,86 +3207,103 @@ static int mv88e6xxx_set_eeprom(struct dsa_switch *ds,
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}
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static const struct mv88e6xxx_ops mv88e6085_ops = {
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.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
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.phy_read = mv88e6xxx_phy_ppu_read,
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.phy_write = mv88e6xxx_phy_ppu_write,
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};
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static const struct mv88e6xxx_ops mv88e6095_ops = {
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.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
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.phy_read = mv88e6xxx_phy_ppu_read,
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.phy_write = mv88e6xxx_phy_ppu_write,
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};
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static const struct mv88e6xxx_ops mv88e6123_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_read,
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.phy_write = mv88e6xxx_write,
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};
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static const struct mv88e6xxx_ops mv88e6131_ops = {
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.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
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.phy_read = mv88e6xxx_phy_ppu_read,
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.phy_write = mv88e6xxx_phy_ppu_write,
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};
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static const struct mv88e6xxx_ops mv88e6161_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_read,
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.phy_write = mv88e6xxx_write,
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};
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static const struct mv88e6xxx_ops mv88e6165_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_read,
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.phy_write = mv88e6xxx_write,
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};
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static const struct mv88e6xxx_ops mv88e6171_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6172_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6175_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6176_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6185_ops = {
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.set_switch_mac = mv88e6xxx_g1_set_switch_mac,
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.phy_read = mv88e6xxx_phy_ppu_read,
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.phy_write = mv88e6xxx_phy_ppu_write,
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};
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static const struct mv88e6xxx_ops mv88e6240_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6320_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6321_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6350_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6351_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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static const struct mv88e6xxx_ops mv88e6352_ops = {
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.set_switch_mac = mv88e6xxx_g2_set_switch_mac,
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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};
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@ -423,7 +423,6 @@ enum mv88e6xxx_cap {
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MV88E6XXX_CAP_G2_IRL_DATA, /* (0x0a) Ingress Rate Data */
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MV88E6XXX_CAP_G2_PVT_ADDR, /* (0x0b) Cross Chip Port VLAN Addr */
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MV88E6XXX_CAP_G2_PVT_DATA, /* (0x0c) Cross Chip Port VLAN Data */
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MV88E6XXX_CAP_G2_SWITCH_MAC, /* (0x0d) Switch MAC/WoL/WoF */
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MV88E6XXX_CAP_G2_POT, /* (0x0f) Priority Override Table */
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MV88E6XXX_CAP_G2_EEPROM_CMD, /* (0x14) EEPROM Command */
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MV88E6XXX_CAP_G2_EEPROM_DATA, /* (0x15) EEPROM Data */
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@ -473,7 +472,6 @@ enum mv88e6xxx_cap {
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#define MV88E6XXX_FLAG_G2_IRL_DATA BIT_ULL(MV88E6XXX_CAP_G2_IRL_DATA)
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#define MV88E6XXX_FLAG_G2_PVT_ADDR BIT_ULL(MV88E6XXX_CAP_G2_PVT_ADDR)
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#define MV88E6XXX_FLAG_G2_PVT_DATA BIT_ULL(MV88E6XXX_CAP_G2_PVT_DATA)
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#define MV88E6XXX_FLAG_G2_SWITCH_MAC BIT_ULL(MV88E6XXX_CAP_G2_SWITCH_MAC)
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#define MV88E6XXX_FLAG_G2_POT BIT_ULL(MV88E6XXX_CAP_G2_POT)
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#define MV88E6XXX_FLAG_G2_EEPROM_CMD BIT_ULL(MV88E6XXX_CAP_G2_EEPROM_CMD)
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#define MV88E6XXX_FLAG_G2_EEPROM_DATA BIT_ULL(MV88E6XXX_CAP_G2_EEPROM_DATA)
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@ -537,7 +535,6 @@ enum mv88e6xxx_cap {
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MV88E6XXX_FLAG_GLOBAL2 | \
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MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
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MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
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MV88E6XXX_FLAG_G2_SWITCH_MAC | \
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MV88E6XXX_FLAG_G2_POT | \
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MV88E6XXX_FLAG_STU | \
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MV88E6XXX_FLAG_TEMP | \
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@ -559,7 +556,6 @@ enum mv88e6xxx_cap {
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MV88E6XXX_FLAG_GLOBAL2 | \
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MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
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MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
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MV88E6XXX_FLAG_G2_SWITCH_MAC | \
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MV88E6XXX_FLAG_G2_POT | \
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MV88E6XXX_FLAG_PPU_ACTIVE | \
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MV88E6XXX_FLAG_TEMP | \
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@ -577,7 +573,6 @@ enum mv88e6xxx_cap {
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MV88E6XXX_FLAG_GLOBAL2 | \
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MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
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MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
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MV88E6XXX_FLAG_G2_SWITCH_MAC | \
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MV88E6XXX_FLAG_G2_POT | \
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MV88E6XXX_FLAG_PPU_ACTIVE | \
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MV88E6XXX_FLAG_STU | \
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@ -595,7 +590,6 @@ enum mv88e6xxx_cap {
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MV88E6XXX_FLAG_GLOBAL2 | \
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MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
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MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
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MV88E6XXX_FLAG_G2_SWITCH_MAC | \
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MV88E6XXX_FLAG_G2_POT | \
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MV88E6XXX_FLAG_PPU_ACTIVE | \
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MV88E6XXX_FLAG_STU | \
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@ -702,6 +696,8 @@ struct mv88e6xxx_bus_ops {
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};
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struct mv88e6xxx_ops {
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int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr);
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int (*phy_read)(struct mv88e6xxx_chip *chip, int addr, int reg,
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u16 *val);
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int (*phy_write)(struct mv88e6xxx_chip *chip, int addr, int reg,
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