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ARM: sunxi: dt: Convert users to the PIO interrupts binding

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The current DTs were setting the cell size to 2, but used the default xlate
function that was assuming an interrupt cell size of 1, leading to the
second part of the cell (the flags) being ignored, while we were having an
inconsistent binding between the interrupts and gpio (that could also be
used as interrupts).

That "binding" doesn't work either with newer SoCs that have multiple irq
banks.

Now that we fixed the pinctrl driver to handle this like it should always
have been handled, convert the DT users, and while we're at it, remove the
size-cells property of PIO that is completely useless.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Maxime Ripard 2015-06-17 11:44:24 +02:00
parent 79ae3e66f8
commit b03e081672
8 changed files with 8 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -726,8 +726,7 @@
clocks = <&apb0_gates 5>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
#size-cells = <0>;
#interrupt-cells = <3>;
#gpio-cells = <3>;
pwm0_pins_a: pwm0@0 {

2
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
View File

@ -93,7 +93,7 @@
compatible = "chipone,icn8318";
reg = <0x40>;
interrupt-parent = <&pio>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
pinctrl-names = "default";
pinctrl-0 = <&ts_wake_pin_p66>;
wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */

3
arch/arm/boot/dts/sun5i.dtsi
View File

@ -488,8 +488,7 @@
clocks = <&apb0_gates 5>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
#size-cells = <0>;
#interrupt-cells = <3>;
#gpio-cells = <3>;
i2c0_pins_a: i2c0@0 {

3
arch/arm/boot/dts/sun6i-a31.dtsi
View File

@ -612,8 +612,7 @@
clocks = <&apb1_gates 5>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
#size-cells = <0>;
#interrupt-cells = <3>;
#gpio-cells = <3>;
uart0_pins_a: uart0@0 {

2
arch/arm/boot/dts/sun7i-a20-cubietruck.dts
View File

@ -181,7 +181,7 @@
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
interrupt-names = "host-wake";
};
};

2
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
View File

@ -178,7 +178,7 @@
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
interrupt-names = "host-wake";
};
};

3
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -807,8 +807,7 @@
clocks = <&apb0_gates 5>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <2>;
#size-cells = <0>;
#interrupt-cells = <3>;
#gpio-cells = <3>;
pwm0_pins_a: pwm0@0 {

3
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View File

@ -361,8 +361,7 @@
clocks = <&apb1_gates 5>;
gpio-controller;
interrupt-controller;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <3>;
#gpio-cells = <3>;
uart0_pins_a: uart0@0 {