mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-18 16:44:27 +08:00
drm/i915: Make intel_ring_setup_status_page() static
This function is only used in intel_ringbuffer.c, so restrict it to that file. The function was moved around to avoid a forward declaration and group it with its user. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> [danvet: Squash in fixup from Wu Fengguang.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
a2f8aeb328
commit
af75f26918
@ -502,6 +502,68 @@ static void ring_setup_phys_status_page(struct intel_engine_cs *ring)
|
|||||||
I915_WRITE(HWS_PGA, addr);
|
I915_WRITE(HWS_PGA, addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void intel_ring_setup_status_page(struct intel_engine_cs *ring)
|
||||||
|
{
|
||||||
|
struct drm_device *dev = ring->dev;
|
||||||
|
struct drm_i915_private *dev_priv = ring->dev->dev_private;
|
||||||
|
u32 mmio = 0;
|
||||||
|
|
||||||
|
/* The ring status page addresses are no longer next to the rest of
|
||||||
|
* the ring registers as of gen7.
|
||||||
|
*/
|
||||||
|
if (IS_GEN7(dev)) {
|
||||||
|
switch (ring->id) {
|
||||||
|
case RCS:
|
||||||
|
mmio = RENDER_HWS_PGA_GEN7;
|
||||||
|
break;
|
||||||
|
case BCS:
|
||||||
|
mmio = BLT_HWS_PGA_GEN7;
|
||||||
|
break;
|
||||||
|
/*
|
||||||
|
* VCS2 actually doesn't exist on Gen7. Only shut up
|
||||||
|
* gcc switch check warning
|
||||||
|
*/
|
||||||
|
case VCS2:
|
||||||
|
case VCS:
|
||||||
|
mmio = BSD_HWS_PGA_GEN7;
|
||||||
|
break;
|
||||||
|
case VECS:
|
||||||
|
mmio = VEBOX_HWS_PGA_GEN7;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} else if (IS_GEN6(ring->dev)) {
|
||||||
|
mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
|
||||||
|
} else {
|
||||||
|
/* XXX: gen8 returns to sanity */
|
||||||
|
mmio = RING_HWS_PGA(ring->mmio_base);
|
||||||
|
}
|
||||||
|
|
||||||
|
I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
|
||||||
|
POSTING_READ(mmio);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Flush the TLB for this page
|
||||||
|
*
|
||||||
|
* FIXME: These two bits have disappeared on gen8, so a question
|
||||||
|
* arises: do we still need this and if so how should we go about
|
||||||
|
* invalidating the TLB?
|
||||||
|
*/
|
||||||
|
if (INTEL_INFO(dev)->gen >= 6 && INTEL_INFO(dev)->gen < 8) {
|
||||||
|
u32 reg = RING_INSTPM(ring->mmio_base);
|
||||||
|
|
||||||
|
/* ring should be idle before issuing a sync flush*/
|
||||||
|
WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
|
||||||
|
|
||||||
|
I915_WRITE(reg,
|
||||||
|
_MASKED_BIT_ENABLE(INSTPM_TLB_INVALIDATE |
|
||||||
|
INSTPM_SYNC_FLUSH));
|
||||||
|
if (wait_for((I915_READ(reg) & INSTPM_SYNC_FLUSH) == 0,
|
||||||
|
1000))
|
||||||
|
DRM_ERROR("%s: wait for SyncFlush to complete for TLB invalidation timed out\n",
|
||||||
|
ring->name);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static bool stop_ring(struct intel_engine_cs *ring)
|
static bool stop_ring(struct intel_engine_cs *ring)
|
||||||
{
|
{
|
||||||
struct drm_i915_private *dev_priv = to_i915(ring->dev);
|
struct drm_i915_private *dev_priv = to_i915(ring->dev);
|
||||||
@ -1438,68 +1500,6 @@ i8xx_ring_put_irq(struct intel_engine_cs *ring)
|
|||||||
spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
|
spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
void intel_ring_setup_status_page(struct intel_engine_cs *ring)
|
|
||||||
{
|
|
||||||
struct drm_device *dev = ring->dev;
|
|
||||||
struct drm_i915_private *dev_priv = ring->dev->dev_private;
|
|
||||||
u32 mmio = 0;
|
|
||||||
|
|
||||||
/* The ring status page addresses are no longer next to the rest of
|
|
||||||
* the ring registers as of gen7.
|
|
||||||
*/
|
|
||||||
if (IS_GEN7(dev)) {
|
|
||||||
switch (ring->id) {
|
|
||||||
case RCS:
|
|
||||||
mmio = RENDER_HWS_PGA_GEN7;
|
|
||||||
break;
|
|
||||||
case BCS:
|
|
||||||
mmio = BLT_HWS_PGA_GEN7;
|
|
||||||
break;
|
|
||||||
/*
|
|
||||||
* VCS2 actually doesn't exist on Gen7. Only shut up
|
|
||||||
* gcc switch check warning
|
|
||||||
*/
|
|
||||||
case VCS2:
|
|
||||||
case VCS:
|
|
||||||
mmio = BSD_HWS_PGA_GEN7;
|
|
||||||
break;
|
|
||||||
case VECS:
|
|
||||||
mmio = VEBOX_HWS_PGA_GEN7;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
} else if (IS_GEN6(ring->dev)) {
|
|
||||||
mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
|
|
||||||
} else {
|
|
||||||
/* XXX: gen8 returns to sanity */
|
|
||||||
mmio = RING_HWS_PGA(ring->mmio_base);
|
|
||||||
}
|
|
||||||
|
|
||||||
I915_WRITE(mmio, (u32)ring->status_page.gfx_addr);
|
|
||||||
POSTING_READ(mmio);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Flush the TLB for this page
|
|
||||||
*
|
|
||||||
* FIXME: These two bits have disappeared on gen8, so a question
|
|
||||||
* arises: do we still need this and if so how should we go about
|
|
||||||
* invalidating the TLB?
|
|
||||||
*/
|
|
||||||
if (INTEL_INFO(dev)->gen >= 6 && INTEL_INFO(dev)->gen < 8) {
|
|
||||||
u32 reg = RING_INSTPM(ring->mmio_base);
|
|
||||||
|
|
||||||
/* ring should be idle before issuing a sync flush*/
|
|
||||||
WARN_ON((I915_READ_MODE(ring) & MODE_IDLE) == 0);
|
|
||||||
|
|
||||||
I915_WRITE(reg,
|
|
||||||
_MASKED_BIT_ENABLE(INSTPM_TLB_INVALIDATE |
|
|
||||||
INSTPM_SYNC_FLUSH));
|
|
||||||
if (wait_for((I915_READ(reg) & INSTPM_SYNC_FLUSH) == 0,
|
|
||||||
1000))
|
|
||||||
DRM_ERROR("%s: wait for SyncFlush to complete for TLB invalidation timed out\n",
|
|
||||||
ring->name);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static int
|
static int
|
||||||
bsd_ring_flush(struct intel_engine_cs *ring,
|
bsd_ring_flush(struct intel_engine_cs *ring,
|
||||||
u32 invalidate_domains,
|
u32 invalidate_domains,
|
||||||
|
@ -425,7 +425,6 @@ int intel_init_blt_ring_buffer(struct drm_device *dev);
|
|||||||
int intel_init_vebox_ring_buffer(struct drm_device *dev);
|
int intel_init_vebox_ring_buffer(struct drm_device *dev);
|
||||||
|
|
||||||
u64 intel_ring_get_active_head(struct intel_engine_cs *ring);
|
u64 intel_ring_get_active_head(struct intel_engine_cs *ring);
|
||||||
void intel_ring_setup_status_page(struct intel_engine_cs *ring);
|
|
||||||
|
|
||||||
int init_workarounds_ring(struct intel_engine_cs *ring);
|
int init_workarounds_ring(struct intel_engine_cs *ring);
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user