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crypto: x86/aegis128 - optimize length block preparation using SSE4.1
Start using SSE4.1 instructions in the AES-NI AEGIS code, with the first use case being preparing the length block in fewer instructions. In practice this does not reduce the set of CPUs on which the code can run, because all Intel and AMD CPUs with AES-NI also have SSE4.1. Upgrade the existing SSE2 feature check to SSE4.1, though it seems this check is not strictly necessary; the aesni-intel module has been getting away with using SSE4.1 despite checking for AES-NI only. Reviewed-by: Ondrej Mosnacek <omosnace@redhat.com> Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -363,7 +363,7 @@ config CRYPTO_CHACHA20_X86_64
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- AVX-512VL (Advanced Vector Extensions-512VL)
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config CRYPTO_AEGIS128_AESNI_SSE2
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tristate "AEAD ciphers: AEGIS-128 (AES-NI/SSE2)"
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tristate "AEAD ciphers: AEGIS-128 (AES-NI/SSE4.1)"
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depends on X86 && 64BIT
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select CRYPTO_AEAD
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select CRYPTO_SIMD
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@ -372,7 +372,7 @@ config CRYPTO_AEGIS128_AESNI_SSE2
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Architecture: x86_64 using:
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- AES-NI (AES New Instructions)
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- SSE2 (Streaming SIMD Extensions 2)
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- SSE4.1 (Streaming SIMD Extensions 4.1)
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config CRYPTO_NHPOLY1305_SSE2
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tristate "Hash functions: NHPoly1305 (SSE2)"
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AES-NI + SSE2 implementation of AEGIS-128
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* AES-NI + SSE4.1 implementation of AEGIS-128
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*
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* Copyright (c) 2017-2018 Ondrej Mosnacek <omosnacek@gmail.com>
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* Copyright (C) 2017-2018 Red Hat, Inc. All rights reserved.
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@ -638,9 +638,7 @@ SYM_FUNC_START(crypto_aegis128_aesni_final)
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/* prepare length block: */
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movd %edx, MSG
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movd %ecx, T0
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pslldq $8, T0
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pxor T0, MSG
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pinsrd $2, %ecx, MSG
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psllq $3, MSG /* multiply by 8 (to get bit count) */
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pxor STATE3, MSG
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* The AEGIS-128 Authenticated-Encryption Algorithm
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* Glue for AES-NI + SSE2 implementation
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* Glue for AES-NI + SSE4.1 implementation
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*
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* Copyright (c) 2017-2018 Ondrej Mosnacek <omosnacek@gmail.com>
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* Copyright (C) 2017-2018 Red Hat, Inc. All rights reserved.
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@ -254,7 +254,7 @@ static struct simd_aead_alg *simd_alg;
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static int __init crypto_aegis128_aesni_module_init(void)
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{
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if (!boot_cpu_has(X86_FEATURE_XMM2) ||
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if (!boot_cpu_has(X86_FEATURE_XMM4_1) ||
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!boot_cpu_has(X86_FEATURE_AES) ||
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!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
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return -ENODEV;
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@ -273,6 +273,6 @@ module_exit(crypto_aegis128_aesni_module_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Ondrej Mosnacek <omosnacek@gmail.com>");
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MODULE_DESCRIPTION("AEGIS-128 AEAD algorithm -- AESNI+SSE2 implementation");
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MODULE_DESCRIPTION("AEGIS-128 AEAD algorithm -- AESNI+SSE4.1 implementation");
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MODULE_ALIAS_CRYPTO("aegis128");
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MODULE_ALIAS_CRYPTO("aegis128-aesni");
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