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x86/intel: Aggregate big core mobile naming
Currently big core mobile chips have either: - _L - _ULT - _MOBILE Make it uniformly: _L. for i in `git grep -l "\(INTEL_FAM6_\|VULNWL_INTEL\|INTEL_CPU_FAM6\).*_\(MOBILE\|ULT\)"` do sed -i -e 's/\(\(INTEL_FAM6_\|VULNWL_INTEL\|INTEL_CPU_FAM6\).*\)_\(MOBILE\|ULT\)/\1_L/g' ${i} done Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Tony Luck <tony.luck@intel.com> Cc: x86@kernel.org Cc: Dave Hansen <dave.hansen@intel.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20190827195122.568978530@infradead.org
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@ -3965,7 +3965,7 @@ static __init void intel_clovertown_quirk(void)
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static const struct x86_cpu_desc isolation_ucodes[] = {
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INTEL_CPU_DESC(INTEL_FAM6_HASWELL, 3, 0x0000001f),
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INTEL_CPU_DESC(INTEL_FAM6_HASWELL_ULT, 1, 0x0000001e),
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INTEL_CPU_DESC(INTEL_FAM6_HASWELL_L, 1, 0x0000001e),
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INTEL_CPU_DESC(INTEL_FAM6_HASWELL_GT3E, 1, 0x00000015),
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INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X, 2, 0x00000037),
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INTEL_CPU_DESC(INTEL_FAM6_HASWELL_X, 4, 0x0000000a),
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@ -3978,13 +3978,13 @@ static const struct x86_cpu_desc isolation_ucodes[] = {
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INTEL_CPU_DESC(INTEL_FAM6_BROADWELL_X, 2, 0x0b000014),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 3, 0x00000021),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_X, 4, 0x00000000),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_MOBILE, 3, 0x0000007c),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE_L, 3, 0x0000007c),
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INTEL_CPU_DESC(INTEL_FAM6_SKYLAKE, 3, 0x0000007c),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 9, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE, 9, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE, 10, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE, 11, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_MOBILE, 12, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 9, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 10, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 11, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE_L, 12, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 10, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 11, 0x0000004e),
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INTEL_CPU_DESC(INTEL_FAM6_KABYLAKE, 12, 0x0000004e),
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@ -4859,7 +4859,7 @@ __init int intel_pmu_init(void)
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case INTEL_FAM6_HASWELL:
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case INTEL_FAM6_HASWELL_X:
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case INTEL_FAM6_HASWELL_ULT:
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case INTEL_FAM6_HASWELL_L:
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case INTEL_FAM6_HASWELL_GT3E:
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x86_add_quirk(intel_ht_bug);
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x86_add_quirk(intel_pebs_isolation_quirk);
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@ -4955,9 +4955,9 @@ __init int intel_pmu_init(void)
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case INTEL_FAM6_SKYLAKE_X:
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pmem = true;
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/* fall through */
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case INTEL_FAM6_SKYLAKE_MOBILE:
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case INTEL_FAM6_SKYLAKE_L:
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case INTEL_FAM6_SKYLAKE:
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case INTEL_FAM6_KABYLAKE_MOBILE:
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case INTEL_FAM6_KABYLAKE_L:
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case INTEL_FAM6_KABYLAKE:
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x86_add_quirk(intel_pebs_isolation_quirk);
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x86_pmu.late_ack = true;
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@ -5005,7 +5005,7 @@ __init int intel_pmu_init(void)
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case INTEL_FAM6_ICELAKE_XEON_D:
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pmem = true;
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/* fall through */
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case INTEL_FAM6_ICELAKE_MOBILE:
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case INTEL_FAM6_ICELAKE_L:
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case INTEL_FAM6_ICELAKE:
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x86_pmu.late_ack = true;
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memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
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@ -597,7 +597,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_X, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_GT3E, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_ULT, hswult_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_HASWELL_L, hswult_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT, slm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ATOM_SILVERMONT_X, slm_cstates),
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@ -608,14 +608,14 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
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X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_GT3E, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_X, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_L, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_X, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE, hswult_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE, hswult_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_L, hswult_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE, hswult_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_MOBILE, cnl_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_L, cnl_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNL, knl_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates),
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@ -625,8 +625,8 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
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X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_MOBILE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_L, snb_cstates),
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X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE, snb_cstates),
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{ },
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
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@ -722,7 +722,7 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X, model_snbep),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_X, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_L, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E, model_hsw),
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@ -730,16 +730,16 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, model_knl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, model_knl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_L, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_L, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_L, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_X, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_L, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE, model_skl),
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{},
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};
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@ -1452,7 +1452,7 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE, snb_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE, ivb_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL, hsw_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT, hsw_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_L, hsw_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E, hsw_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL, bdw_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E, bdw_uncore_init),
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@ -1466,11 +1466,11 @@ static const struct x86_cpu_id intel_uncore_match[] __initconst = {
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, knl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, knl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE, skl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, skl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_L, skl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, skx_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_MOBILE, skl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE_L, skl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_KABYLAKE, skl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, icl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_L, icl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE_NNPI, icl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ICELAKE, icl_uncore_init),
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X86_UNCORE_MODEL_MATCH(INTEL_FAM6_ATOM_TREMONT_X, snr_uncore_init),
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@ -61,7 +61,7 @@ static bool test_intel(int idx, void *data)
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case INTEL_FAM6_HASWELL:
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case INTEL_FAM6_HASWELL_X:
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case INTEL_FAM6_HASWELL_ULT:
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case INTEL_FAM6_HASWELL_L:
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case INTEL_FAM6_HASWELL_GT3E:
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case INTEL_FAM6_BROADWELL:
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@ -84,12 +84,12 @@ static bool test_intel(int idx, void *data)
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return true;
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break;
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case INTEL_FAM6_SKYLAKE_MOBILE:
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case INTEL_FAM6_SKYLAKE_L:
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case INTEL_FAM6_SKYLAKE:
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case INTEL_FAM6_SKYLAKE_X:
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case INTEL_FAM6_KABYLAKE_MOBILE:
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case INTEL_FAM6_KABYLAKE_L:
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case INTEL_FAM6_KABYLAKE:
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case INTEL_FAM6_ICELAKE_MOBILE:
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case INTEL_FAM6_ICELAKE_L:
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if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
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return true;
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break;
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@ -51,7 +51,7 @@
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#define INTEL_FAM6_HASWELL 0x3C
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#define INTEL_FAM6_HASWELL_X 0x3F
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#define INTEL_FAM6_HASWELL_ULT 0x45
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#define INTEL_FAM6_HASWELL_L 0x45
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#define INTEL_FAM6_HASWELL_GT3E 0x46
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#define INTEL_FAM6_BROADWELL 0x3D
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@ -59,18 +59,18 @@
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#define INTEL_FAM6_BROADWELL_X 0x4F
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#define INTEL_FAM6_BROADWELL_XEON_D 0x56
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#define INTEL_FAM6_SKYLAKE_MOBILE 0x4E
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#define INTEL_FAM6_SKYLAKE_L 0x4E
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#define INTEL_FAM6_SKYLAKE 0x5E
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#define INTEL_FAM6_SKYLAKE_X 0x55
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#define INTEL_FAM6_KABYLAKE_MOBILE 0x8E
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#define INTEL_FAM6_KABYLAKE_L 0x8E
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#define INTEL_FAM6_KABYLAKE 0x9E
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#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66
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#define INTEL_FAM6_CANNONLAKE_L 0x66
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#define INTEL_FAM6_ICELAKE_X 0x6A
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#define INTEL_FAM6_ICELAKE_XEON_D 0x6C
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#define INTEL_FAM6_ICELAKE 0x7D
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#define INTEL_FAM6_ICELAKE_MOBILE 0x7E
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#define INTEL_FAM6_ICELAKE_L 0x7E
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#define INTEL_FAM6_ICELAKE_NNPI 0x9D
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/* "Small Core" Processors (Atom) */
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@ -594,16 +594,16 @@ static const struct x86_cpu_id deadline_match[] = {
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DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_SKYLAKE_X, skx_deadline_rev),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL, 0x22),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_ULT, 0x20),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_L, 0x20),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_HASWELL_GT3E, 0x17),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL, 0x25),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_GT3E, 0x17),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_MOBILE, 0xb2),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE_L, 0xb2),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_SKYLAKE, 0xb2),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE_MOBILE, 0x52),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE_L, 0x52),
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DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_KABYLAKE, 0x52),
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{},
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@ -1185,13 +1185,13 @@ static void override_cache_bits(struct cpuinfo_x86 *c)
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case INTEL_FAM6_SANDYBRIDGE:
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case INTEL_FAM6_IVYBRIDGE:
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case INTEL_FAM6_HASWELL:
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case INTEL_FAM6_HASWELL_ULT:
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case INTEL_FAM6_HASWELL_L:
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case INTEL_FAM6_HASWELL_GT3E:
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case INTEL_FAM6_BROADWELL:
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case INTEL_FAM6_BROADWELL_GT3E:
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case INTEL_FAM6_SKYLAKE_MOBILE:
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case INTEL_FAM6_SKYLAKE_L:
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case INTEL_FAM6_SKYLAKE:
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case INTEL_FAM6_KABYLAKE_MOBILE:
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case INTEL_FAM6_KABYLAKE_L:
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case INTEL_FAM6_KABYLAKE:
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if (c->x86_cache_bits < 44)
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c->x86_cache_bits = 44;
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@ -145,8 +145,8 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
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{ INTEL_FAM6_KABYLAKE, 0x0B, 0x80 },
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{ INTEL_FAM6_KABYLAKE, 0x0A, 0x80 },
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{ INTEL_FAM6_KABYLAKE, 0x09, 0x80 },
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{ INTEL_FAM6_KABYLAKE_MOBILE, 0x0A, 0x80 },
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{ INTEL_FAM6_KABYLAKE_MOBILE, 0x09, 0x80 },
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{ INTEL_FAM6_KABYLAKE_L, 0x0A, 0x80 },
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{ INTEL_FAM6_KABYLAKE_L, 0x09, 0x80 },
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{ INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e },
|
||||
{ INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c },
|
||||
{ INTEL_FAM6_BROADWELL, 0x04, 0x28 },
|
||||
@ -154,7 +154,7 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
|
||||
{ INTEL_FAM6_BROADWELL_XEON_D, 0x02, 0x14 },
|
||||
{ INTEL_FAM6_BROADWELL_XEON_D, 0x03, 0x07000011 },
|
||||
{ INTEL_FAM6_BROADWELL_X, 0x01, 0x0b000025 },
|
||||
{ INTEL_FAM6_HASWELL_ULT, 0x01, 0x21 },
|
||||
{ INTEL_FAM6_HASWELL_L, 0x01, 0x21 },
|
||||
{ INTEL_FAM6_HASWELL_GT3E, 0x01, 0x18 },
|
||||
{ INTEL_FAM6_HASWELL, 0x03, 0x23 },
|
||||
{ INTEL_FAM6_HASWELL_X, 0x02, 0x3b },
|
||||
|
@ -69,11 +69,11 @@ static const struct always_present_id always_present_ids[] = {
|
||||
* after _SB.PCI0.GFX0.LCD.LCD1._ON gets called has passed
|
||||
* *and* _STA has been called at least 3 times since.
|
||||
*/
|
||||
ENTRY("SYNA7500", "1", ICPU(INTEL_FAM6_HASWELL_ULT), {
|
||||
ENTRY("SYNA7500", "1", ICPU(INTEL_FAM6_HASWELL_L), {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7130"),
|
||||
}),
|
||||
ENTRY("SYNA7500", "1", ICPU(INTEL_FAM6_HASWELL_ULT), {
|
||||
ENTRY("SYNA7500", "1", ICPU(INTEL_FAM6_HASWELL_L), {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "Venue 11 Pro 7139"),
|
||||
}),
|
||||
|
@ -1875,11 +1875,11 @@ static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
|
||||
ICPU(INTEL_FAM6_BROADWELL, core_funcs),
|
||||
ICPU(INTEL_FAM6_IVYBRIDGE_X, core_funcs),
|
||||
ICPU(INTEL_FAM6_HASWELL_X, core_funcs),
|
||||
ICPU(INTEL_FAM6_HASWELL_ULT, core_funcs),
|
||||
ICPU(INTEL_FAM6_HASWELL_L, core_funcs),
|
||||
ICPU(INTEL_FAM6_HASWELL_GT3E, core_funcs),
|
||||
ICPU(INTEL_FAM6_BROADWELL_GT3E, core_funcs),
|
||||
ICPU(INTEL_FAM6_ATOM_AIRMONT, airmont_funcs),
|
||||
ICPU(INTEL_FAM6_SKYLAKE_MOBILE, core_funcs),
|
||||
ICPU(INTEL_FAM6_SKYLAKE_L, core_funcs),
|
||||
ICPU(INTEL_FAM6_BROADWELL_X, core_funcs),
|
||||
ICPU(INTEL_FAM6_SKYLAKE, core_funcs),
|
||||
ICPU(INTEL_FAM6_BROADWELL_XEON_D, core_funcs),
|
||||
|
@ -1074,16 +1074,16 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
|
||||
INTEL_CPU_FAM6(IVYBRIDGE_X, idle_cpu_ivt),
|
||||
INTEL_CPU_FAM6(HASWELL, idle_cpu_hsw),
|
||||
INTEL_CPU_FAM6(HASWELL_X, idle_cpu_hsw),
|
||||
INTEL_CPU_FAM6(HASWELL_ULT, idle_cpu_hsw),
|
||||
INTEL_CPU_FAM6(HASWELL_L, idle_cpu_hsw),
|
||||
INTEL_CPU_FAM6(HASWELL_GT3E, idle_cpu_hsw),
|
||||
INTEL_CPU_FAM6(ATOM_SILVERMONT_X, idle_cpu_avn),
|
||||
INTEL_CPU_FAM6(BROADWELL, idle_cpu_bdw),
|
||||
INTEL_CPU_FAM6(BROADWELL_GT3E, idle_cpu_bdw),
|
||||
INTEL_CPU_FAM6(BROADWELL_X, idle_cpu_bdw),
|
||||
INTEL_CPU_FAM6(BROADWELL_XEON_D, idle_cpu_bdw),
|
||||
INTEL_CPU_FAM6(SKYLAKE_MOBILE, idle_cpu_skl),
|
||||
INTEL_CPU_FAM6(SKYLAKE_L, idle_cpu_skl),
|
||||
INTEL_CPU_FAM6(SKYLAKE, idle_cpu_skl),
|
||||
INTEL_CPU_FAM6(KABYLAKE_MOBILE, idle_cpu_skl),
|
||||
INTEL_CPU_FAM6(KABYLAKE_L, idle_cpu_skl),
|
||||
INTEL_CPU_FAM6(KABYLAKE, idle_cpu_skl),
|
||||
INTEL_CPU_FAM6(SKYLAKE_X, idle_cpu_skx),
|
||||
INTEL_CPU_FAM6(XEON_PHI_KNL, idle_cpu_knl),
|
||||
|
@ -806,12 +806,12 @@ static inline void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev)
|
||||
#endif /* CONFIG_DEBUG_FS */
|
||||
|
||||
static const struct x86_cpu_id intel_pmc_core_ids[] = {
|
||||
INTEL_CPU_FAM6(SKYLAKE_MOBILE, spt_reg_map),
|
||||
INTEL_CPU_FAM6(SKYLAKE_L, spt_reg_map),
|
||||
INTEL_CPU_FAM6(SKYLAKE, spt_reg_map),
|
||||
INTEL_CPU_FAM6(KABYLAKE_MOBILE, spt_reg_map),
|
||||
INTEL_CPU_FAM6(KABYLAKE_L, spt_reg_map),
|
||||
INTEL_CPU_FAM6(KABYLAKE, spt_reg_map),
|
||||
INTEL_CPU_FAM6(CANNONLAKE_MOBILE, cnp_reg_map),
|
||||
INTEL_CPU_FAM6(ICELAKE_MOBILE, icl_reg_map),
|
||||
INTEL_CPU_FAM6(CANNONLAKE_L, cnp_reg_map),
|
||||
INTEL_CPU_FAM6(ICELAKE_L, icl_reg_map),
|
||||
INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map),
|
||||
{}
|
||||
};
|
||||
|
@ -30,12 +30,12 @@ static struct platform_device pmc_core_device = {
|
||||
* other list may grow, but this list should not.
|
||||
*/
|
||||
static const struct x86_cpu_id intel_pmc_core_platform_ids[] = {
|
||||
INTEL_CPU_FAM6(SKYLAKE_MOBILE, pmc_core_device),
|
||||
INTEL_CPU_FAM6(SKYLAKE_L, pmc_core_device),
|
||||
INTEL_CPU_FAM6(SKYLAKE, pmc_core_device),
|
||||
INTEL_CPU_FAM6(KABYLAKE_MOBILE, pmc_core_device),
|
||||
INTEL_CPU_FAM6(KABYLAKE_L, pmc_core_device),
|
||||
INTEL_CPU_FAM6(KABYLAKE, pmc_core_device),
|
||||
INTEL_CPU_FAM6(CANNONLAKE_MOBILE, pmc_core_device),
|
||||
INTEL_CPU_FAM6(ICELAKE_MOBILE, pmc_core_device),
|
||||
INTEL_CPU_FAM6(CANNONLAKE_L, pmc_core_device),
|
||||
INTEL_CPU_FAM6(ICELAKE_L, pmc_core_device),
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_platform_ids);
|
||||
|
@ -958,7 +958,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
|
||||
INTEL_CPU_FAM6(IVYBRIDGE_X, rapl_defaults_core),
|
||||
|
||||
INTEL_CPU_FAM6(HASWELL, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(HASWELL_ULT, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(HASWELL_L, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(HASWELL_GT3E, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(HASWELL_X, rapl_defaults_hsw_server),
|
||||
|
||||
@ -968,12 +968,12 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
|
||||
INTEL_CPU_FAM6(BROADWELL_X, rapl_defaults_hsw_server),
|
||||
|
||||
INTEL_CPU_FAM6(SKYLAKE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(SKYLAKE_MOBILE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(SKYLAKE_L, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(SKYLAKE_X, rapl_defaults_hsw_server),
|
||||
INTEL_CPU_FAM6(KABYLAKE_MOBILE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(KABYLAKE_L, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(KABYLAKE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(CANNONLAKE_MOBILE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(ICELAKE_MOBILE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(CANNONLAKE_L, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(ICELAKE_L, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(ICELAKE, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(ICELAKE_NNPI, rapl_defaults_core),
|
||||
INTEL_CPU_FAM6(ICELAKE_X, rapl_defaults_hsw_server),
|
||||
|
@ -3213,8 +3213,8 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
|
||||
case INTEL_FAM6_BROADWELL: /* BDW */
|
||||
case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
|
||||
case INTEL_FAM6_BROADWELL_X: /* BDX */
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
pkg_cstate_limits = hsw_pkg_cstate_limits;
|
||||
has_misc_feature_control = 1;
|
||||
break;
|
||||
@ -3409,8 +3409,8 @@ int has_config_tdp(unsigned int family, unsigned int model)
|
||||
case INTEL_FAM6_BROADWELL: /* BDW */
|
||||
case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
|
||||
case INTEL_FAM6_BROADWELL_X: /* BDX */
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_X: /* SKX */
|
||||
|
||||
case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
|
||||
@ -3863,8 +3863,8 @@ void rapl_probe_intel(unsigned int family, unsigned int model)
|
||||
else
|
||||
BIC_PRESENT(BIC_PkgWatt);
|
||||
break;
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
|
||||
BIC_PRESENT(BIC_PKG__);
|
||||
BIC_PRESENT(BIC_RAM__);
|
||||
@ -4255,8 +4255,8 @@ int has_snb_msrs(unsigned int family, unsigned int model)
|
||||
case INTEL_FAM6_BROADWELL: /* BDW */
|
||||
case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
|
||||
case INTEL_FAM6_BROADWELL_X: /* BDX */
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_X: /* SKX */
|
||||
case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
|
||||
case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
|
||||
@ -4286,8 +4286,8 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
|
||||
switch (model) {
|
||||
case INTEL_FAM6_HASWELL:
|
||||
case INTEL_FAM6_BROADWELL: /* BDW */
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
|
||||
case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
|
||||
return 1;
|
||||
@ -4309,8 +4309,8 @@ int has_skl_msrs(unsigned int family, unsigned int model)
|
||||
return 0;
|
||||
|
||||
switch (model) {
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
@ -4345,7 +4345,7 @@ int is_cnl(unsigned int family, unsigned int model)
|
||||
return 0;
|
||||
|
||||
switch (model) {
|
||||
case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
|
||||
case INTEL_FAM6_CANNONLAKE_L: /* CNL */
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -4568,21 +4568,21 @@ unsigned int intel_model_duplicates(unsigned int model)
|
||||
case INTEL_FAM6_XEON_PHI_KNM:
|
||||
return INTEL_FAM6_XEON_PHI_KNL;
|
||||
|
||||
case INTEL_FAM6_HASWELL_ULT:
|
||||
case INTEL_FAM6_HASWELL_L:
|
||||
return INTEL_FAM6_HASWELL;
|
||||
|
||||
case INTEL_FAM6_BROADWELL_X:
|
||||
case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
|
||||
return INTEL_FAM6_BROADWELL_X;
|
||||
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE:
|
||||
case INTEL_FAM6_SKYLAKE_L:
|
||||
case INTEL_FAM6_SKYLAKE:
|
||||
case INTEL_FAM6_KABYLAKE_MOBILE:
|
||||
case INTEL_FAM6_KABYLAKE_L:
|
||||
case INTEL_FAM6_KABYLAKE:
|
||||
return INTEL_FAM6_SKYLAKE_MOBILE;
|
||||
return INTEL_FAM6_SKYLAKE_L;
|
||||
|
||||
case INTEL_FAM6_ICELAKE_MOBILE:
|
||||
return INTEL_FAM6_CANNONLAKE_MOBILE;
|
||||
case INTEL_FAM6_ICELAKE_L:
|
||||
return INTEL_FAM6_CANNONLAKE_L;
|
||||
}
|
||||
return model;
|
||||
}
|
||||
@ -4731,7 +4731,7 @@ void process_cpuid()
|
||||
|
||||
if (crystal_hz == 0)
|
||||
switch(model) {
|
||||
case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
|
||||
case INTEL_FAM6_SKYLAKE_L: /* SKL */
|
||||
crystal_hz = 24000000; /* 24.0 MHz */
|
||||
break;
|
||||
case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
|
||||
|
Loading…
Reference in New Issue
Block a user