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https://mirrors.bfsu.edu.cn/git/linux.git
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mt76: implement A-MPDU rx reordering in the driver code
This is required for performing CCMP PN validation in software Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Felix Fietkau
Kalle Valo
parent
9c68a57bc2
commit
aee5b8cf24
@ -2,7 +2,7 @@ obj-$(CONFIG_MT76_CORE) += mt76.o
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obj-$(CONFIG_MT76x2E) += mt76x2e.o
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mt76-y := \
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mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o tx.o
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mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o tx.o agg-rx.o
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CFLAGS_trace.o := -I$(src)
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264
drivers/net/wireless/mediatek/mt76/agg-rx.c
Normal file
264
drivers/net/wireless/mediatek/mt76/agg-rx.c
Normal file
@ -0,0 +1,264 @@
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/*
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* Copyright (C) 2018 Felix Fietkau <nbd@nbd.name>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "mt76.h"
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#define REORDER_TIMEOUT (HZ / 10)
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static void
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mt76_aggr_release(struct mt76_rx_tid *tid, struct sk_buff_head *frames, int idx)
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{
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struct sk_buff *skb;
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tid->head = ieee80211_sn_inc(tid->head);
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skb = tid->reorder_buf[idx];
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if (!skb)
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return;
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tid->reorder_buf[idx] = NULL;
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tid->nframes--;
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__skb_queue_tail(frames, skb);
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}
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static void
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mt76_rx_aggr_release_frames(struct mt76_rx_tid *tid, struct sk_buff_head *frames,
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u16 head)
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{
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int idx;
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while (ieee80211_sn_less(tid->head, head)) {
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idx = tid->head % tid->size;
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mt76_aggr_release(tid, frames, idx);
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}
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}
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static void
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mt76_rx_aggr_release_head(struct mt76_rx_tid *tid, struct sk_buff_head *frames)
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{
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int idx = tid->head % tid->size;
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while (tid->reorder_buf[idx]) {
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mt76_aggr_release(tid, frames, idx);
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idx = tid->head % tid->size;
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}
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}
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static void
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mt76_rx_aggr_check_release(struct mt76_rx_tid *tid, struct sk_buff_head *frames)
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{
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struct mt76_rx_status *status;
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struct sk_buff *skb;
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int start, idx, nframes;
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if (!tid->nframes)
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return;
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mt76_rx_aggr_release_head(tid, frames);
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start = tid->head % tid->size;
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nframes = tid->nframes;
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for (idx = (tid->head + 1) % tid->size;
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idx != start && nframes;
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idx = (idx + 1) % tid->size) {
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skb = tid->reorder_buf[idx];
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if (!skb)
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continue;
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nframes--;
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status = (struct mt76_rx_status *) skb->cb;
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if (!time_after(jiffies, status->reorder_time +
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REORDER_TIMEOUT))
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continue;
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mt76_rx_aggr_release_frames(tid, frames, status->seqno);
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}
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mt76_rx_aggr_release_head(tid, frames);
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}
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static void
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mt76_rx_aggr_reorder_work(struct work_struct *work)
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{
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struct mt76_rx_tid *tid = container_of(work, struct mt76_rx_tid,
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reorder_work.work);
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struct mt76_dev *dev = tid->dev;
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struct ieee80211_sta *sta;
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struct sk_buff_head frames;
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struct sk_buff *skb;
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__skb_queue_head_init(&frames);
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local_bh_disable();
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spin_lock(&tid->lock);
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mt76_rx_aggr_check_release(tid, &frames);
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spin_unlock(&tid->lock);
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ieee80211_queue_delayed_work(tid->dev->hw, &tid->reorder_work, REORDER_TIMEOUT);
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while ((skb = __skb_dequeue(&frames)) != NULL) {
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sta = mt76_rx_convert(skb);
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ieee80211_rx_napi(dev->hw, sta, skb, NULL);
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}
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local_bh_enable();
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}
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void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames)
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{
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struct mt76_rx_status *status = (struct mt76_rx_status *) skb->cb;
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struct mt76_wcid *wcid = status->wcid;
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struct ieee80211_sta *sta;
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struct mt76_rx_tid *tid;
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bool sn_less;
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u16 seqno, head, size;
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u8 idx;
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__skb_queue_tail(frames, skb);
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sta = wcid_to_sta(wcid);
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if (!sta || !status->aggr)
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return;
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tid = rcu_dereference(wcid->aggr[status->tid]);
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if (!tid)
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return;
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spin_lock_bh(&tid->lock);
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if (tid->stopped)
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goto out;
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head = tid->head;
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seqno = status->seqno;
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size = tid->size;
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sn_less = ieee80211_sn_less(seqno, head);
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if (!tid->started) {
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if (sn_less)
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goto out;
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tid->started = true;
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}
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if (sn_less) {
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__skb_unlink(skb, frames);
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dev_kfree_skb(skb);
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goto out;
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}
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if (seqno == head) {
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tid->head = ieee80211_sn_inc(head);
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if (tid->nframes)
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mt76_rx_aggr_release_head(tid, frames);
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goto out;
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}
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__skb_unlink(skb, frames);
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/*
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* Frame sequence number exceeds buffering window, free up some space
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* by releasing previous frames
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*/
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if (!ieee80211_sn_less(seqno, head + size)) {
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head = ieee80211_sn_inc(ieee80211_sn_sub(seqno, size));
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mt76_rx_aggr_release_frames(tid, frames, head);
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}
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idx = seqno % size;
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/* Discard if the current slot is already in use */
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if (tid->reorder_buf[idx]) {
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dev_kfree_skb(skb);
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goto out;
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}
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status->reorder_time = jiffies;
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tid->reorder_buf[idx] = skb;
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tid->nframes++;
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mt76_rx_aggr_release_head(tid, frames);
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ieee80211_queue_delayed_work(tid->dev->hw, &tid->reorder_work, REORDER_TIMEOUT);
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out:
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spin_unlock_bh(&tid->lock);
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}
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int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tidno,
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u16 ssn, u8 size)
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{
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struct mt76_rx_tid *tid;
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mt76_rx_aggr_stop(dev, wcid, tidno);
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tid = kzalloc(sizeof(*tid) + size * sizeof(tid->reorder_buf[0]),
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GFP_KERNEL);
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if (!tid)
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return -ENOMEM;
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tid->dev = dev;
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tid->head = ssn;
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tid->size = size;
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INIT_DELAYED_WORK(&tid->reorder_work, mt76_rx_aggr_reorder_work);
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spin_lock_init(&tid->lock);
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rcu_assign_pointer(wcid->aggr[tidno], tid);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mt76_rx_aggr_start);
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static void mt76_rx_aggr_shutdown(struct mt76_dev *dev, struct mt76_rx_tid *tid)
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{
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u8 size = tid->size;
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int i;
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spin_lock_bh(&tid->lock);
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tid->stopped = true;
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for (i = 0; tid->nframes && i < size; i++) {
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struct sk_buff *skb = tid->reorder_buf[i];
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if (!skb)
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continue;
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tid->nframes--;
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dev_kfree_skb(skb);
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}
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spin_unlock_bh(&tid->lock);
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cancel_delayed_work_sync(&tid->reorder_work);
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}
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void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tidno)
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{
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struct mt76_rx_tid *tid;
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rcu_read_lock();
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tid = rcu_dereference(wcid->aggr[tidno]);
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if (tid) {
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rcu_assign_pointer(wcid->aggr[tidno], NULL);
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mt76_rx_aggr_shutdown(dev, tid);
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kfree_rcu(tid, rcu_head);
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}
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rcu_read_unlock();
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}
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EXPORT_SYMBOL_GPL(mt76_rx_aggr_stop);
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@ -384,8 +384,7 @@ int mt76_get_survey(struct ieee80211_hw *hw, int idx,
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}
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EXPORT_SYMBOL_GPL(mt76_get_survey);
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static struct ieee80211_sta *
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mt76_rx_convert(struct sk_buff *skb)
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struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb)
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{
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struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
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struct mt76_rx_status mstat;
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@ -414,9 +413,15 @@ mt76_rx_convert(struct sk_buff *skb)
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void mt76_rx_complete(struct mt76_dev *dev, enum mt76_rxq_id q)
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{
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struct ieee80211_sta *sta;
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struct sk_buff_head frames;
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struct sk_buff *skb;
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while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL) {
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__skb_queue_head_init(&frames);
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while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL)
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mt76_rx_aggr_reorder(skb, &frames);
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while ((skb = __skb_dequeue(&frames)) != NULL) {
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sta = mt76_rx_convert(skb);
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ieee80211_rx_napi(dev->hw, sta, skb, &dev->napi[q]);
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}
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@ -122,6 +122,10 @@ struct mt76_queue_ops {
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};
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struct mt76_wcid {
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struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
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struct work_struct aggr_work;
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u8 idx;
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u8 hw_key_idx;
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@ -152,6 +156,24 @@ struct mt76_txwi_cache {
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struct list_head list;
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};
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struct mt76_rx_tid {
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struct rcu_head rcu_head;
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struct mt76_dev *dev;
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spinlock_t lock;
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struct delayed_work reorder_work;
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u16 head;
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u8 size;
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u8 nframes;
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u8 started:1, stopped:1, timer_pending:1;
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struct sk_buff *reorder_buf[];
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};
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enum {
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MT76_STATE_INITIALIZED,
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MT76_STATE_RUNNING,
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@ -254,6 +276,13 @@ struct mt76_rate_power {
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struct mt76_rx_status {
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struct mt76_wcid *wcid;
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unsigned long reorder_time;
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u8 aggr;
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u8 tid;
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u16 seqno;
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u32 flag;
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u16 freq;
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u8 enc_flags;
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@ -380,9 +409,15 @@ void mt76_set_channel(struct mt76_dev *dev);
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int mt76_get_survey(struct ieee80211_hw *hw, int idx,
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struct survey_info *survey);
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int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
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u16 ssn, u8 size);
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void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid);
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/* internal */
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void mt76_tx_free(struct mt76_dev *dev);
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void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
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void mt76_rx_complete(struct mt76_dev *dev, enum mt76_rxq_id q);
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void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
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struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb);
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#endif
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@ -842,6 +842,8 @@ int mt76x2_register_device(struct mt76x2_dev *dev)
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wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
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ieee80211_hw_set(hw, SUPPORTS_HT_CCK_RATES);
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ieee80211_hw_set(hw, SUPPORTS_REORDERING_BUFFER);
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INIT_DELAYED_WORK(&dev->cal_work, mt76x2_phy_calibrate);
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INIT_DELAYED_WORK(&dev->mac_work, mt76x2_mac_work);
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@ -281,6 +281,7 @@ int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
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struct mt76x2_rxwi *rxwi = rxi;
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u32 ctl = le32_to_cpu(rxwi->ctl);
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u16 rate = le16_to_cpu(rxwi->rate);
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u16 tid_sn = le16_to_cpu(rxwi->tid_sn);
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u8 wcid;
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int len;
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@ -290,6 +291,9 @@ int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
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if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_L2PAD))
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mt76x2_remove_hdr_pad(skb);
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if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_BA))
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status->aggr = true;
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if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_DECRYPT)) {
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status->flag |= RX_FLAG_DECRYPTED;
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status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
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@ -307,6 +311,9 @@ int mt76x2_mac_process_rx(struct mt76x2_dev *dev, struct sk_buff *skb,
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status->freq = dev->mt76.chandef.chan->center_freq;
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status->band = dev->mt76.chandef.chan->band;
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status->tid = FIELD_GET(MT_RXWI_TID, tid_sn);
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status->seqno = FIELD_GET(MT_RXWI_SN, tid_sn);
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return mt76x2_mac_process_rate(status, rate);
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}
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@ -487,9 +487,11 @@ mt76x2_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
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switch (action) {
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case IEEE80211_AMPDU_RX_START:
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mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, *ssn, params->buf_size);
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mt76_set(dev, MT_WCID_ADDR(msta->wcid.idx) + 4, BIT(16 + tid));
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break;
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case IEEE80211_AMPDU_RX_STOP:
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mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
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mt76_clear(dev, MT_WCID_ADDR(msta->wcid.idx) + 4,
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BIT(16 + tid));
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break;
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