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staging: comedi: addi_apci_1564: absorb apci1564_reset()
This is the only reset fuction used by this driver. We can remove it from the boardinfo and absorb the code from hwdrv_apci1564.c into the driver. Signed-off-by: Chase Southwood <chase.southwood@gmail.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -578,35 +578,3 @@ static void apci1564_interrupt(int irq, void *d)
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}
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return;
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}
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static int apci1564_reset(struct comedi_device *dev)
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{
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struct addi_private *devpriv = dev->private;
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ui_Type = 0;
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/* Disable the input interrupts and reset status register */
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);
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inl(devpriv->i_IobaseAmcc + APCI1564_DI_INT_STATUS_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE2_REG);
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/* Reset the output channels and disable interrupts */
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_INT_CTRL_REG);
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/* Reset the watchdog registers */
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addi_watchdog_reset(devpriv->i_IobaseAmcc + APCI1564_WDOG_REG);
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/* Reset the timer registers */
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_CTRL_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_RELOAD_REG);
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/* Reset the counter registers */
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
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return 0;
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}
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@ -16,7 +16,6 @@ static const struct addi_board apci1564_boardtypes[] = {
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.i_DoMaxdata = 0xffffffff,
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.i_Timer = 1,
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.interrupt = apci1564_interrupt,
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.reset = apci1564_reset,
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.timer_config = apci1564_timer_config,
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.timer_write = apci1564_timer_write,
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.timer_read = apci1564_timer_read,
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@ -32,11 +31,35 @@ static irqreturn_t v_ADDI_Interrupt(int irq, void *d)
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return IRQ_RETVAL(1);
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}
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static int i_ADDI_Reset(struct comedi_device *dev)
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static int apci1564_reset(struct comedi_device *dev)
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{
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const struct addi_board *this_board = comedi_board(dev);
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struct addi_private *devpriv = dev->private;
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ui_Type = 0;
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/* Disable the input interrupts and reset status register */
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_IRQ_REG);
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inl(devpriv->i_IobaseAmcc + APCI1564_DI_INT_STATUS_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE1_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DI_INT_MODE2_REG);
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/* Reset the output channels and disable interrupts */
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_DO_INT_CTRL_REG);
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/* Reset the watchdog registers */
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addi_watchdog_reset(devpriv->i_IobaseAmcc + APCI1564_WDOG_REG);
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/* Reset the timer registers */
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_CTRL_REG);
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outl(0x0, devpriv->i_IobaseAmcc + APCI1564_TIMER_RELOAD_REG);
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/* Reset the counter registers */
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER1));
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER2));
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER3));
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outl(0x0, dev->iobase + APCI1564_TCW_CTRL_REG(APCI1564_COUNTER4));
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this_board->reset(dev);
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return 0;
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}
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@ -62,6 +85,8 @@ static int apci1564_auto_attach(struct comedi_device *dev,
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dev->iobase = pci_resource_start(pcidev, 1);
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devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
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apci1564_reset(dev);
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if (pcidev->irq > 0) {
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ret = request_irq(pcidev->irq, v_ADDI_Interrupt, IRQF_SHARED,
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dev->board_name, dev);
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@ -114,7 +139,6 @@ static int apci1564_auto_attach(struct comedi_device *dev,
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s->type = COMEDI_SUBD_UNUSED;
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}
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i_ADDI_Reset(dev);
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return 0;
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}
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@ -124,7 +148,7 @@ static void apci1564_detach(struct comedi_device *dev)
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if (devpriv) {
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if (dev->iobase)
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i_ADDI_Reset(dev);
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apci1564_reset(dev);
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if (dev->irq)
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free_irq(dev->irq, dev);
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}
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