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drm/gma500: Hook up the MMU
Properly init the MMU and add MMU entries when adding GTT entries Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
This commit is contained in:
parent
1c6b5d17d6
commit
ae012bdc57
@ -22,6 +22,7 @@
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#include <drm/drmP.h>
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#include <linux/shmem_fs.h>
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#include "psb_drv.h"
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#include "blitter.h"
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/*
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@ -105,11 +106,13 @@ static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r,
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/* Write our page entries into the GTT itself */
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for (i = r->roll; i < r->npage; i++) {
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]),
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PSB_MMU_CACHED_MEMORY);
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iowrite32(pte, gtt_slot++);
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}
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for (i = 0; i < r->roll; i++) {
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]),
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PSB_MMU_CACHED_MEMORY);
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iowrite32(pte, gtt_slot++);
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}
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/* Make sure all the entries are set before we return */
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@ -127,7 +130,7 @@ static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r,
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* page table entries with the dummy page. This is protected via the gtt
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* mutex which the caller must hold.
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*/
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static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)
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void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 __iomem *gtt_slot;
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@ -137,7 +140,8 @@ static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)
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WARN_ON(r->stolen);
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gtt_slot = psb_gtt_entry(dev, r);
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pte = psb_gtt_mask_pte(page_to_pfn(dev_priv->scratch_page), 0);
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pte = psb_gtt_mask_pte(page_to_pfn(dev_priv->scratch_page),
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PSB_MMU_CACHED_MEMORY);
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for (i = 0; i < r->npage; i++)
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iowrite32(pte, gtt_slot++);
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@ -176,11 +180,13 @@ void psb_gtt_roll(struct drm_device *dev, struct gtt_range *r, int roll)
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gtt_slot = psb_gtt_entry(dev, r);
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for (i = r->roll; i < r->npage; i++) {
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]),
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PSB_MMU_CACHED_MEMORY);
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iowrite32(pte, gtt_slot++);
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}
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for (i = 0; i < r->roll; i++) {
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
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pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]),
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PSB_MMU_CACHED_MEMORY);
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iowrite32(pte, gtt_slot++);
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}
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ioread32(gtt_slot - 1);
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@ -240,6 +246,7 @@ int psb_gtt_pin(struct gtt_range *gt)
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int ret = 0;
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struct drm_device *dev = gt->gem.dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 gpu_base = dev_priv->gtt.gatt_start;
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mutex_lock(&dev_priv->gtt_mutex);
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@ -252,6 +259,9 @@ int psb_gtt_pin(struct gtt_range *gt)
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psb_gtt_detach_pages(gt);
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goto out;
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}
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psb_mmu_insert_pages(psb_mmu_get_default_pd(dev_priv->mmu),
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gt->pages, (gpu_base + gt->offset),
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gt->npage, 0, 0, PSB_MMU_CACHED_MEMORY);
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}
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gt->in_gart++;
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out:
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@ -274,16 +284,30 @@ void psb_gtt_unpin(struct gtt_range *gt)
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{
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struct drm_device *dev = gt->gem.dev;
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 gpu_base = dev_priv->gtt.gatt_start;
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int ret;
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/* While holding the gtt_mutex no new blits can be initiated */
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mutex_lock(&dev_priv->gtt_mutex);
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/* Wait for any possible usage of the memory to be finished */
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ret = gma_blt_wait_idle(dev_priv);
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if (ret) {
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DRM_ERROR("Failed to idle the blitter, unpin failed!");
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goto out;
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}
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WARN_ON(!gt->in_gart);
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gt->in_gart--;
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if (gt->in_gart == 0 && gt->stolen == 0) {
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psb_mmu_remove_pages(psb_mmu_get_default_pd(dev_priv->mmu),
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(gpu_base + gt->offset), gt->npage, 0, 0);
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psb_gtt_remove(dev, gt);
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psb_gtt_detach_pages(gt);
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}
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out:
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mutex_unlock(&dev_priv->gtt_mutex);
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}
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@ -497,6 +521,7 @@ int psb_gtt_init(struct drm_device *dev, int resume)
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if (!resume)
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dev_priv->vram_addr = ioremap_wc(dev_priv->stolen_base,
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stolen_size);
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if (!dev_priv->vram_addr) {
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dev_err(dev->dev, "Failure to map stolen base.\n");
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ret = -ENOMEM;
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@ -512,7 +537,7 @@ int psb_gtt_init(struct drm_device *dev, int resume)
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dev_dbg(dev->dev, "Set up %d stolen pages starting at 0x%08x, GTT offset %dK\n",
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num_pages, pfn_base << PAGE_SHIFT, 0);
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for (i = 0; i < num_pages; ++i) {
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pte = psb_gtt_mask_pte(pfn_base + i, 0);
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pte = psb_gtt_mask_pte(pfn_base + i, PSB_MMU_CACHED_MEMORY);
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iowrite32(pte, dev_priv->gtt_map + i);
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}
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@ -521,7 +546,7 @@ int psb_gtt_init(struct drm_device *dev, int resume)
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*/
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pfn_base = page_to_pfn(dev_priv->scratch_page);
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pte = psb_gtt_mask_pte(pfn_base, 0);
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pte = psb_gtt_mask_pte(pfn_base, PSB_MMU_CACHED_MEMORY);
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for (; i < gtt_pages; ++i)
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iowrite32(pte, dev_priv->gtt_map + i);
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@ -192,12 +192,18 @@ static int psb_do_init(struct drm_device *dev)
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PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
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PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
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PSB_RSGX32(PSB_CR_BIF_BANK1);
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PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
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PSB_CR_BIF_CTRL);
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/* Do not bypass any MMU access, let them pagefault instead */
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PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
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PSB_CR_BIF_CTRL);
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PSB_RSGX32(PSB_CR_BIF_CTRL);
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psb_spank(dev_priv);
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/* mmu_gatt ?? */
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PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
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PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
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return 0;
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out_err:
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return ret;
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@ -277,6 +283,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
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int ret = -ENOMEM;
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struct drm_connector *connector;
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struct gma_encoder *gma_encoder;
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struct psb_gtt *pg;
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dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
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if (dev_priv == NULL)
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@ -286,6 +293,8 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
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dev_priv->dev = dev;
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dev->dev_private = (void *) dev_priv;
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pg = &dev_priv->gtt;
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pci_set_master(dev->pdev);
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dev_priv->num_pipe = dev_priv->ops->pipes;
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@ -355,13 +364,21 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
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if (!dev_priv->pf_pd)
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goto out_err;
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psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
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psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
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ret = psb_do_init(dev);
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if (ret)
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return ret;
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/* Add stolen memory to SGX MMU */
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down_read(&pg->sem);
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ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
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dev_priv->stolen_base >> PAGE_SHIFT,
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pg->gatt_start,
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pg->stolen_size >> PAGE_SHIFT, 0);
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up_read(&pg->sem);
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psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
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psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
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PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
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PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
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