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igb: make ethtool use core xmit map and free functionality
This change adds a clean_rx/tx_irq type function call to the ethtool loopback testing which allows us to test the core transmit and receive functionality in the driver. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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b1a436c34c
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@ -1254,7 +1254,7 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter)
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struct igb_ring *tx_ring = &adapter->test_tx_ring;
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struct igb_ring *rx_ring = &adapter->test_rx_ring;
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struct e1000_hw *hw = &adapter->hw;
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int i, ret_val;
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int ret_val;
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/* Setup Tx descriptor ring and Tx buffers */
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tx_ring->count = IGB_DEFAULT_TXD;
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@ -1270,34 +1270,6 @@ static int igb_setup_desc_rings(struct igb_adapter *adapter)
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igb_setup_tctl(adapter);
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igb_configure_tx_ring(adapter, tx_ring);
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for (i = 0; i < tx_ring->count; i++) {
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union e1000_adv_tx_desc *tx_desc;
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unsigned int size = 1024;
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struct sk_buff *skb = alloc_skb(size, GFP_KERNEL);
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if (!skb) {
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ret_val = 2;
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goto err_nomem;
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}
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skb_put(skb, size);
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tx_ring->buffer_info[i].skb = skb;
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tx_ring->buffer_info[i].length = skb->len;
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tx_ring->buffer_info[i].dma =
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pci_map_single(tx_ring->pdev, skb->data, skb->len,
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PCI_DMA_TODEVICE);
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tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
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tx_desc->read.buffer_addr =
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cpu_to_le64(tx_ring->buffer_info[i].dma);
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tx_desc->read.olinfo_status = cpu_to_le32(skb->len) <<
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E1000_ADVTXD_PAYLEN_SHIFT;
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tx_desc->read.cmd_type_len = cpu_to_le32(skb->len);
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tx_desc->read.cmd_type_len |= cpu_to_le32(E1000_TXD_CMD_EOP |
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E1000_TXD_CMD_IFCS |
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E1000_TXD_CMD_RS |
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E1000_ADVTXD_DTYP_DATA |
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E1000_ADVTXD_DCMD_DEXT);
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}
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/* Setup Rx descriptor ring and Rx buffers */
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rx_ring->count = IGB_DEFAULT_RXD;
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rx_ring->pdev = adapter->pdev;
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@ -1470,14 +1442,78 @@ static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
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return 13;
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}
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static int igb_clean_test_rings(struct igb_ring *rx_ring,
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struct igb_ring *tx_ring,
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unsigned int size)
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{
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union e1000_adv_rx_desc *rx_desc;
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struct igb_buffer *buffer_info;
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int rx_ntc, tx_ntc, count = 0;
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u32 staterr;
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/* initialize next to clean and descriptor values */
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rx_ntc = rx_ring->next_to_clean;
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tx_ntc = tx_ring->next_to_clean;
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rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
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staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
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while (staterr & E1000_RXD_STAT_DD) {
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/* check rx buffer */
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buffer_info = &rx_ring->buffer_info[rx_ntc];
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/* unmap rx buffer, will be remapped by alloc_rx_buffers */
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pci_unmap_single(rx_ring->pdev,
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buffer_info->dma,
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rx_ring->rx_buffer_len,
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PCI_DMA_FROMDEVICE);
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buffer_info->dma = 0;
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/* verify contents of skb */
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if (!igb_check_lbtest_frame(buffer_info->skb, size))
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count++;
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/* unmap buffer on tx side */
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buffer_info = &tx_ring->buffer_info[tx_ntc];
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igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
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/* increment rx/tx next to clean counters */
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rx_ntc++;
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if (rx_ntc == rx_ring->count)
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rx_ntc = 0;
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tx_ntc++;
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if (tx_ntc == tx_ring->count)
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tx_ntc = 0;
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/* fetch next descriptor */
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rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
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staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
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}
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/* re-map buffers to ring, store next to clean values */
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igb_alloc_rx_buffers_adv(rx_ring, count);
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rx_ring->next_to_clean = rx_ntc;
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tx_ring->next_to_clean = tx_ntc;
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return count;
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}
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static int igb_run_loopback_test(struct igb_adapter *adapter)
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{
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struct igb_ring *tx_ring = &adapter->test_tx_ring;
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struct igb_ring *rx_ring = &adapter->test_rx_ring;
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int i, j, k, l, lc, good_cnt, ret_val = 0;
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unsigned long time;
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int i, j, lc, good_cnt, ret_val = 0;
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unsigned int size = 1024;
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netdev_tx_t tx_ret_val;
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struct sk_buff *skb;
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writel(rx_ring->count - 1, rx_ring->tail);
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/* allocate test skb */
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skb = alloc_skb(size, GFP_KERNEL);
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if (!skb)
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return 11;
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/* place data into test skb */
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igb_create_lbtest_frame(skb, size);
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skb_put(skb, size);
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/* Calculate the loop count based on the largest descriptor ring
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* The idea is to wrap the largest ring a number of times using 64
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@ -1489,50 +1525,36 @@ static int igb_run_loopback_test(struct igb_adapter *adapter)
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else
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lc = ((rx_ring->count / 64) * 2) + 1;
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k = l = 0;
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for (j = 0; j <= lc; j++) { /* loop count loop */
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for (i = 0; i < 64; i++) { /* send the packets */
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igb_create_lbtest_frame(tx_ring->buffer_info[k].skb,
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1024);
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pci_dma_sync_single_for_device(tx_ring->pdev,
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tx_ring->buffer_info[k].dma,
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tx_ring->buffer_info[k].length,
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PCI_DMA_TODEVICE);
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k++;
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if (k == tx_ring->count)
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k = 0;
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}
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writel(k, tx_ring->tail);
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msleep(200);
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time = jiffies; /* set the start time for the receive */
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/* reset count of good packets */
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good_cnt = 0;
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do { /* receive the sent packets */
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pci_dma_sync_single_for_cpu(rx_ring->pdev,
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rx_ring->buffer_info[l].dma,
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IGB_RXBUFFER_2048,
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PCI_DMA_FROMDEVICE);
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ret_val = igb_check_lbtest_frame(
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rx_ring->buffer_info[l].skb, 1024);
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if (!ret_val)
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/* place 64 packets on the transmit queue*/
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for (i = 0; i < 64; i++) {
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skb_get(skb);
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tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
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if (tx_ret_val == NETDEV_TX_OK)
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good_cnt++;
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l++;
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if (l == rx_ring->count)
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l = 0;
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/* time + 20 msecs (200 msecs on 2.4) is more than
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* enough time to complete the receives, if it's
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* exceeded, break and error off
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*/
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} while (good_cnt < 64 && jiffies < (time + 20));
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}
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if (good_cnt != 64) {
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ret_val = 13; /* ret_val is the same as mis-compare */
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ret_val = 12;
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break;
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}
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if (jiffies >= (time + 20)) {
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ret_val = 14; /* error code for time out error */
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/* allow 200 milliseconds for packets to go from tx to rx */
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msleep(200);
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good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
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if (good_cnt != 64) {
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ret_val = 13;
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break;
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}
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} /* end loop count loop */
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/* free the original skb */
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kfree_skb(skb);
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return ret_val;
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}
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