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MIPS: math-emu: Replace DP_MBITS with DP_FBITS and SP_MBITS with SP_FBITS.
Both were defined as 23 rsp. 52 though the mentissa is actually a bit more than the fraction. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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@ -153,7 +153,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
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xe = xe;
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xs = xs;
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if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
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if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
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xm = XDPSRS1(xm);
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xe++;
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}
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@ -172,7 +172,7 @@ union ieee754dp ieee754dp_add(union ieee754dp x, union ieee754dp y)
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IEEE754_RD);
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/* normalize to rounding precision */
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while ((xm >> (DP_MBITS + 3)) == 0) {
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while ((xm >> (DP_FBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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@ -129,7 +129,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
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int re = xe - ye;
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u64 bm;
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for (bm = DP_MBIT(DP_MBITS + 2); bm; bm >>= 1) {
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for (bm = DP_MBIT(DP_FBITS + 2); bm; bm >>= 1) {
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if (xm >= ym) {
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xm -= ym;
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rm |= bm;
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@ -146,7 +146,7 @@ union ieee754dp ieee754dp_div(union ieee754dp x, union ieee754dp y)
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/* normalise rm to rounding precision ?
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*/
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while ((rm >> (DP_MBITS + 3)) == 0) {
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while ((rm >> (DP_FBITS + 3)) == 0) {
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rm <<= 1;
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re--;
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}
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@ -52,8 +52,8 @@ union ieee754dp ieee754dp_fint(int x)
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}
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/* normalize - result can never be inexact or overflow */
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xe = DP_MBITS;
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while ((xm >> DP_MBITS) == 0) {
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xe = DP_FBITS;
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while ((xm >> DP_FBITS) == 0) {
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xm <<= 1;
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xe--;
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}
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@ -52,15 +52,15 @@ union ieee754dp ieee754dp_flong(s64 x)
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}
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/* normalize */
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xe = DP_MBITS + 3;
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if (xm >> (DP_MBITS + 1 + 3)) {
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xe = DP_FBITS + 3;
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if (xm >> (DP_FBITS + 1 + 3)) {
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/* shunt out overflow bits */
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while (xm >> (DP_MBITS + 1 + 3)) {
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while (xm >> (DP_FBITS + 1 + 3)) {
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XDPSRSX1();
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}
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} else {
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/* normalize in grs extended double precision */
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while ((xm >> (DP_MBITS + 3)) == 0) {
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while ((xm >> (DP_FBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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@ -44,8 +44,8 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
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return ieee754dp_nanxcpt(builddp(xs,
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DP_EMAX + 1 + DP_EBIAS,
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((u64) xm
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<< (DP_MBITS -
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SP_MBITS))), "fsp",
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<< (DP_FBITS -
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SP_FBITS))), "fsp",
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x);
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case IEEE754_CLASS_INF:
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return ieee754dp_inf(xs);
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@ -53,7 +53,7 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
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return ieee754dp_zero(xs);
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case IEEE754_CLASS_DNORM:
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/* normalize */
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while ((xm >> SP_MBITS) == 0) {
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while ((xm >> SP_FBITS) == 0) {
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xm <<= 1;
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xe--;
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}
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@ -69,5 +69,5 @@ union ieee754dp ieee754dp_fsp(union ieee754sp x)
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xm &= ~SP_HIDDEN_BIT;
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return builddp(xs, xe + DP_EBIAS,
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(u64) xm << (DP_MBITS - SP_MBITS));
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(u64) xm << (DP_FBITS - SP_FBITS));
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}
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@ -54,24 +54,24 @@ union ieee754dp ieee754dp_modf(union ieee754dp x, union ieee754dp *ip)
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*ip = ieee754dp_zero(xs);
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return x;
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}
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if (xe >= DP_MBITS) {
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if (xe >= DP_FBITS) {
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*ip = x;
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return ieee754dp_zero(xs);
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}
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/* generate ipart mantissa by clearing bottom bits
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*/
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*ip = builddp(xs, xe + DP_EBIAS,
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((xm >> (DP_MBITS - xe)) << (DP_MBITS - xe)) &
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((xm >> (DP_FBITS - xe)) << (DP_FBITS - xe)) &
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~DP_HIDDEN_BIT);
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/* generate fpart mantissa by clearing top bits
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* and normalizing (must be able to normalize)
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*/
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xm = (xm << (64 - (DP_MBITS - xe))) >> (64 - (DP_MBITS - xe));
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xm = (xm << (64 - (DP_FBITS - xe))) >> (64 - (DP_FBITS - xe));
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if (xm == 0)
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return ieee754dp_zero(xs);
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while ((xm >> DP_MBITS) == 0) {
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while ((xm >> DP_FBITS) == 0) {
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xm <<= 1;
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xe--;
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}
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@ -113,8 +113,8 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
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u64 rm;
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/* shunt to top of word */
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xm <<= 64 - (DP_MBITS + 1);
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ym <<= 64 - (DP_MBITS + 1);
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xm <<= 64 - (DP_FBITS + 1);
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ym <<= 64 - (DP_FBITS + 1);
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/* multiply 32bits xm,ym to give high 32bits rm with stickness
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*/
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@ -162,13 +162,13 @@ union ieee754dp ieee754dp_mul(union ieee754dp x, union ieee754dp y)
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*/
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if ((s64) rm < 0) {
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rm =
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(rm >> (64 - (DP_MBITS + 1 + 3))) |
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((rm << (DP_MBITS + 1 + 3)) != 0);
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(rm >> (64 - (DP_FBITS + 1 + 3))) |
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((rm << (DP_FBITS + 1 + 3)) != 0);
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re++;
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} else {
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rm =
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(rm >> (64 - (DP_MBITS + 1 + 3 + 1))) |
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((rm << (DP_MBITS + 1 + 3 + 1)) != 0);
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(rm >> (64 - (DP_FBITS + 1 + 3 + 1))) |
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((rm << (DP_FBITS + 1 + 3 + 1)) != 0);
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}
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assert(rm & (DP_HIDDEN_BIT << 3));
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DPNORMRET2(rs, re, rm, "mul", x, y);
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@ -158,7 +158,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
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xe = xe;
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xs = xs;
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if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
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if (xm >> (DP_FBITS + 1 + 3)) { /* carry out */
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xm = XDPSRS1(xm); /* shift preserving sticky */
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xe++;
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}
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@ -181,7 +181,7 @@ union ieee754dp ieee754dp_sub(union ieee754dp x, union ieee754dp y)
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/* normalize to rounding precision
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*/
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while ((xm >> (DP_MBITS + 3)) == 0) {
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while ((xm >> (DP_FBITS + 3)) == 0) {
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xm <<= 1;
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xe--;
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}
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@ -54,9 +54,9 @@ int ieee754dp_tint(union ieee754dp x)
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return ieee754si_xcpt(ieee754si_indef(), "dp_tint", x);
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}
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/* oh gawd */
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if (xe > DP_MBITS) {
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xm <<= xe - DP_MBITS;
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} else if (xe < DP_MBITS) {
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if (xe > DP_FBITS) {
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xm <<= xe - DP_FBITS;
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} else if (xe < DP_FBITS) {
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u64 residue;
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int round;
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int sticky;
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@ -68,10 +68,10 @@ int ieee754dp_tint(union ieee754dp x)
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sticky = residue != 0;
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xm = 0;
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} else {
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residue = xm << (64 - DP_MBITS + xe);
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residue = xm << (64 - DP_FBITS + xe);
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round = (residue >> 63) != 0;
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sticky = (residue << 1) != 0;
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xm >>= DP_MBITS - xe;
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xm >>= DP_FBITS - xe;
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}
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/* Note: At this point upper 32 bits of xm are guaranteed
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to be zero */
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@ -57,9 +57,9 @@ s64 ieee754dp_tlong(union ieee754dp x)
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return ieee754di_xcpt(ieee754di_indef(), "dp_tlong", x);
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}
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/* oh gawd */
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if (xe > DP_MBITS) {
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xm <<= xe - DP_MBITS;
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} else if (xe < DP_MBITS) {
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if (xe > DP_FBITS) {
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xm <<= xe - DP_FBITS;
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} else if (xe < DP_FBITS) {
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u64 residue;
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int round;
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int sticky;
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@ -75,10 +75,10 @@ s64 ieee754dp_tlong(union ieee754dp x)
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* so we do it in two steps. Be aware that xe
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* may be -1 */
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residue = xm << (xe + 1);
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residue <<= 63 - DP_MBITS;
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residue <<= 63 - DP_FBITS;
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round = (residue >> 63) != 0;
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sticky = (residue << 1) != 0;
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xm >>= DP_MBITS - xe;
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xm >>= DP_FBITS - xe;
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}
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odd = (xm & 0x1) != 0x0;
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switch (ieee754_csr.rm) {
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@ -43,7 +43,7 @@ int ieee754dp_isnan(union ieee754dp x)
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int ieee754dp_issnan(union ieee754dp x)
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{
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assert(ieee754dp_isnan(x));
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return ((DPMANT(x) & DP_MBIT(DP_MBITS-1)) == DP_MBIT(DP_MBITS-1));
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return ((DPMANT(x) & DP_MBIT(DP_FBITS-1)) == DP_MBIT(DP_FBITS-1));
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}
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@ -73,7 +73,7 @@ union ieee754dp __cold ieee754dp_nanxcpt(union ieee754dp r, const char *op, ...)
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if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
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/* not enabled convert to a quiet NaN */
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DPMANT(r) &= (~DP_MBIT(DP_MBITS-1));
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DPMANT(r) &= (~DP_MBIT(DP_FBITS-1));
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if (ieee754dp_isnan(r))
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return r;
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else
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@ -136,7 +136,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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{
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assert(xm); /* we don't gen exact zeros (probably should) */
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assert((xm >> (DP_MBITS + 1 + 3)) == 0); /* no execess */
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assert((xm >> (DP_FBITS + 1 + 3)) == 0); /* no execess */
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assert(xm & (DP_HIDDEN_BIT << 3));
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if (xe < DP_EMIN) {
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@ -165,7 +165,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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}
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if (xe == DP_EMIN - 1
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&& get_rounding(sn, xm) >> (DP_MBITS + 1 + 3))
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&& get_rounding(sn, xm) >> (DP_FBITS + 1 + 3))
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{
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/* Not tiny after rounding */
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ieee754_setcx(IEEE754_INEXACT);
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@ -195,7 +195,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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xm = get_rounding(sn, xm);
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/* adjust exponent for rounding add overflowing
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*/
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if (xm >> (DP_MBITS + 3 + 1)) {
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if (xm >> (DP_FBITS + 3 + 1)) {
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/* add causes mantissa overflow */
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xm >>= 1;
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xe++;
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@ -204,7 +204,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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/* strip grs bits */
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xm >>= 3;
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assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */
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assert((xm >> (DP_FBITS + 1)) == 0); /* no execess */
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assert(xe >= DP_EMIN);
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if (xe > DP_EMAX) {
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@ -237,7 +237,7 @@ union ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
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ieee754_setcx(IEEE754_UNDERFLOW);
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return builddp(sn, DP_EMIN - 1 + DP_EBIAS, xm);
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} else {
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assert((xm >> (DP_MBITS + 1)) == 0); /* no execess */
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assert((xm >> (DP_FBITS + 1)) == 0); /* no execess */
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assert(xm & DP_HIDDEN_BIT);
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return builddp(sn, xe + DP_EBIAS, xm & ~DP_HIDDEN_BIT);
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@ -32,7 +32,7 @@
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/* 3bit extended double precision sticky right shift */
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#define XDPSRS(v,rs) \
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((rs > (DP_MBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
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((rs > (DP_FBITS+3))?1:((v) >> (rs)) | ((v) << (64-(rs)) != 0))
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#define XDPSRSX1() \
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(xe++, (xm = (xm >> 1) | (xm & 1)))
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@ -42,7 +42,7 @@
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/* convert denormal to normalized with extended exponent */
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#define DPDNORMx(m,e) \
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while ((m >> DP_MBITS) == 0) { m <<= 1; e--; }
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while ((m >> DP_FBITS) == 0) { m <<= 1; e--; }
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#define DPDNORMX DPDNORMx(xm, xe)
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#define DPDNORMY DPDNORMx(ym, ye)
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@ -53,7 +53,7 @@ static inline union ieee754dp builddp(int s, int bx, u64 m)
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assert((s) == 0 || (s) == 1);
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assert((bx) >= DP_EMIN - 1 + DP_EBIAS
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&& (bx) <= DP_EMAX + 1 + DP_EBIAS);
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assert(((m) >> DP_MBITS) == 0);
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assert(((m) >> DP_FBITS) == 0);
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r.parts.sign = s;
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r.parts.bexp = bx;
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@ -31,19 +31,19 @@
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#define DP_EBIAS 1023
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#define DP_EMIN (-1022)
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#define DP_EMAX 1023
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#define DP_MBITS 52
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#define DP_FBITS 52
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#define SP_EBIAS 127
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#define SP_EMIN (-126)
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#define SP_EMAX 127
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#define SP_MBITS 23
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#define SP_FBITS 23
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#define DP_MBIT(x) ((u64)1 << (x))
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#define DP_HIDDEN_BIT DP_MBIT(DP_MBITS)
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#define DP_HIDDEN_BIT DP_MBIT(DP_FBITS)
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#define DP_SIGN_BIT DP_MBIT(63)
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#define SP_MBIT(x) ((u32)1 << (x))
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#define SP_HIDDEN_BIT SP_MBIT(SP_MBITS)
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#define SP_HIDDEN_BIT SP_MBIT(SP_FBITS)
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#define SP_SIGN_BIT SP_MBIT(31)
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@ -94,7 +94,7 @@ static inline int ieee754_tstx(void)
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if (ve == SP_EMAX+1+SP_EBIAS) { \
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if (vm == 0) \
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vc = IEEE754_CLASS_INF; \
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else if (vm & SP_MBIT(SP_MBITS-1)) \
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else if (vm & SP_MBIT(SP_FBITS-1)) \
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vc = IEEE754_CLASS_SNAN; \
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else \
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vc = IEEE754_CLASS_QNAN; \
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@ -128,7 +128,7 @@ static inline int ieee754_tstx(void)
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if (ve == DP_EMAX+1+DP_EBIAS) { \
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if (vm == 0) \
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vc = IEEE754_CLASS_INF; \
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else if (vm & DP_MBIT(DP_MBITS-1)) \
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else if (vm & DP_MBIT(DP_FBITS-1)) \
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vc = IEEE754_CLASS_SNAN; \
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else \
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vc = IEEE754_CLASS_QNAN; \
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@ -43,7 +43,7 @@ int ieee754sp_isnan(union ieee754sp x)
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int ieee754sp_issnan(union ieee754sp x)
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{
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assert(ieee754sp_isnan(x));
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return (SPMANT(x) & SP_MBIT(SP_MBITS-1));
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return (SPMANT(x) & SP_MBIT(SP_FBITS-1));
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}
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@ -74,7 +74,7 @@ union ieee754sp __cold ieee754sp_nanxcpt(union ieee754sp r, const char *op, ...)
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if (!ieee754_setandtestcx(IEEE754_INVALID_OPERATION)) {
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/* not enabled convert to a quiet NaN */
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SPMANT(r) &= (~SP_MBIT(SP_MBITS-1));
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SPMANT(r) &= (~SP_MBIT(SP_FBITS-1));
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if (ieee754sp_isnan(r))
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return r;
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else
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@ -137,7 +137,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
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{
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assert(xm); /* we don't gen exact zeros (probably should) */
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assert((xm >> (SP_MBITS + 1 + 3)) == 0); /* no execess */
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assert((xm >> (SP_FBITS + 1 + 3)) == 0); /* no execess */
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assert(xm & (SP_HIDDEN_BIT << 3));
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if (xe < SP_EMIN) {
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@ -166,7 +166,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
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}
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if (xe == SP_EMIN - 1
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&& get_rounding(sn, xm) >> (SP_MBITS + 1 + 3))
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&& get_rounding(sn, xm) >> (SP_FBITS + 1 + 3))
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{
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/* Not tiny after rounding */
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ieee754_setcx(IEEE754_INEXACT);
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@ -194,7 +194,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
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xm = get_rounding(sn, xm);
|
||||
/* adjust exponent for rounding add overflowing
|
||||
*/
|
||||
if (xm >> (SP_MBITS + 1 + 3)) {
|
||||
if (xm >> (SP_FBITS + 1 + 3)) {
|
||||
/* add causes mantissa overflow */
|
||||
xm >>= 1;
|
||||
xe++;
|
||||
@ -203,7 +203,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
|
||||
/* strip grs bits */
|
||||
xm >>= 3;
|
||||
|
||||
assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */
|
||||
assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */
|
||||
assert(xe >= SP_EMIN);
|
||||
|
||||
if (xe > SP_EMAX) {
|
||||
@ -236,7 +236,7 @@ union ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
|
||||
ieee754_setcx(IEEE754_UNDERFLOW);
|
||||
return buildsp(sn, SP_EMIN - 1 + SP_EBIAS, xm);
|
||||
} else {
|
||||
assert((xm >> (SP_MBITS + 1)) == 0); /* no execess */
|
||||
assert((xm >> (SP_FBITS + 1)) == 0); /* no execess */
|
||||
assert(xm & SP_HIDDEN_BIT);
|
||||
|
||||
return buildsp(sn, xe + SP_EBIAS, xm & ~SP_HIDDEN_BIT);
|
||||
|
@ -33,21 +33,21 @@
|
||||
/* 3bit extended single precision sticky right shift */
|
||||
#define SPXSRSXn(rs) \
|
||||
(xe += rs, \
|
||||
xm = (rs > (SP_MBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0))
|
||||
xm = (rs > (SP_FBITS+3))?1:((xm) >> (rs)) | ((xm) << (32-(rs)) != 0))
|
||||
|
||||
#define SPXSRSX1() \
|
||||
(xe++, (xm = (xm >> 1) | (xm & 1)))
|
||||
|
||||
#define SPXSRSYn(rs) \
|
||||
(ye+=rs, \
|
||||
ym = (rs > (SP_MBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0))
|
||||
ym = (rs > (SP_FBITS+3))?1:((ym) >> (rs)) | ((ym) << (32-(rs)) != 0))
|
||||
|
||||
#define SPXSRSY1() \
|
||||
(ye++, (ym = (ym >> 1) | (ym & 1)))
|
||||
|
||||
/* convert denormal to normalized with extended exponent */
|
||||
#define SPDNORMx(m,e) \
|
||||
while ((m >> SP_MBITS) == 0) { m <<= 1; e--; }
|
||||
while ((m >> SP_FBITS) == 0) { m <<= 1; e--; }
|
||||
#define SPDNORMX SPDNORMx(xm, xe)
|
||||
#define SPDNORMY SPDNORMx(ym, ye)
|
||||
|
||||
@ -58,7 +58,7 @@ static inline union ieee754sp buildsp(int s, int bx, unsigned m)
|
||||
assert((s) == 0 || (s) == 1);
|
||||
assert((bx) >= SP_EMIN - 1 + SP_EBIAS
|
||||
&& (bx) <= SP_EMAX + 1 + SP_EBIAS);
|
||||
assert(((m) >> SP_MBITS) == 0);
|
||||
assert(((m) >> SP_FBITS) == 0);
|
||||
|
||||
r.parts.sign = s;
|
||||
r.parts.bexp = bx;
|
||||
|
@ -148,7 +148,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
|
||||
xe = xe;
|
||||
xs = xs;
|
||||
|
||||
if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
|
||||
if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
|
||||
SPXSRSX1();
|
||||
}
|
||||
} else {
|
||||
@ -166,7 +166,7 @@ union ieee754sp ieee754sp_add(union ieee754sp x, union ieee754sp y)
|
||||
IEEE754_RD);
|
||||
|
||||
/* normalize in extended single precision */
|
||||
while ((xm >> (SP_MBITS + 3)) == 0) {
|
||||
while ((xm >> (SP_FBITS + 3)) == 0) {
|
||||
xm <<= 1;
|
||||
xe--;
|
||||
}
|
||||
|
@ -129,7 +129,7 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
|
||||
int re = xe - ye;
|
||||
unsigned bm;
|
||||
|
||||
for (bm = SP_MBIT(SP_MBITS + 2); bm; bm >>= 1) {
|
||||
for (bm = SP_MBIT(SP_FBITS + 2); bm; bm >>= 1) {
|
||||
if (xm >= ym) {
|
||||
xm -= ym;
|
||||
rm |= bm;
|
||||
@ -146,7 +146,7 @@ union ieee754sp ieee754sp_div(union ieee754sp x, union ieee754sp y)
|
||||
|
||||
/* normalise rm to rounding precision ?
|
||||
*/
|
||||
while ((rm >> (SP_MBITS + 3)) == 0) {
|
||||
while ((rm >> (SP_FBITS + 3)) == 0) {
|
||||
rm <<= 1;
|
||||
re--;
|
||||
}
|
||||
|
@ -43,7 +43,7 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
|
||||
return ieee754sp_nanxcpt(ieee754sp_indef(), "fdp");
|
||||
case IEEE754_CLASS_QNAN:
|
||||
nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32)
|
||||
(xm >> (DP_MBITS - SP_MBITS)));
|
||||
(xm >> (DP_FBITS - SP_FBITS)));
|
||||
if (!ieee754sp_isnan(nan))
|
||||
nan = ieee754sp_indef();
|
||||
return ieee754sp_nanxcpt(nan, "fdp", x);
|
||||
@ -66,10 +66,10 @@ union ieee754sp ieee754sp_fdp(union ieee754dp x)
|
||||
{
|
||||
u32 rm;
|
||||
|
||||
/* convert from DP_MBITS to SP_MBITS+3 with sticky right shift
|
||||
/* convert from DP_FBITS to SP_FBITS+3 with sticky right shift
|
||||
*/
|
||||
rm = (xm >> (DP_MBITS - (SP_MBITS + 3))) |
|
||||
((xm << (64 - (DP_MBITS - (SP_MBITS + 3)))) != 0);
|
||||
rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
|
||||
((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
|
||||
|
||||
SPNORMRET1(xs, xe, rm, "fdp", x);
|
||||
}
|
||||
|
@ -50,18 +50,18 @@ union ieee754sp ieee754sp_fint(int x)
|
||||
} else {
|
||||
xm = x;
|
||||
}
|
||||
xe = SP_MBITS + 3;
|
||||
xe = SP_FBITS + 3;
|
||||
|
||||
if (xm >> (SP_MBITS + 1 + 3)) {
|
||||
if (xm >> (SP_FBITS + 1 + 3)) {
|
||||
/* shunt out overflow bits
|
||||
*/
|
||||
while (xm >> (SP_MBITS + 1 + 3)) {
|
||||
while (xm >> (SP_FBITS + 1 + 3)) {
|
||||
SPXSRSX1();
|
||||
}
|
||||
} else {
|
||||
/* normalize in grs extended single precision
|
||||
*/
|
||||
while ((xm >> (SP_MBITS + 3)) == 0) {
|
||||
while ((xm >> (SP_FBITS + 3)) == 0) {
|
||||
xm <<= 1;
|
||||
xe--;
|
||||
}
|
||||
|
@ -50,17 +50,17 @@ union ieee754sp ieee754sp_flong(s64 x)
|
||||
} else {
|
||||
xm = x;
|
||||
}
|
||||
xe = SP_MBITS + 3;
|
||||
xe = SP_FBITS + 3;
|
||||
|
||||
if (xm >> (SP_MBITS + 1 + 3)) {
|
||||
if (xm >> (SP_FBITS + 1 + 3)) {
|
||||
/* shunt out overflow bits
|
||||
*/
|
||||
while (xm >> (SP_MBITS + 1 + 3)) {
|
||||
while (xm >> (SP_FBITS + 1 + 3)) {
|
||||
SPXSRSX1();
|
||||
}
|
||||
} else {
|
||||
/* normalize in grs extended single precision */
|
||||
while ((xm >> (SP_MBITS + 3)) == 0) {
|
||||
while ((xm >> (SP_FBITS + 3)) == 0) {
|
||||
xm <<= 1;
|
||||
xe--;
|
||||
}
|
||||
|
@ -54,24 +54,24 @@ union ieee754sp ieee754sp_modf(union ieee754sp x, union ieee754sp *ip)
|
||||
*ip = ieee754sp_zero(xs);
|
||||
return x;
|
||||
}
|
||||
if (xe >= SP_MBITS) {
|
||||
if (xe >= SP_FBITS) {
|
||||
*ip = x;
|
||||
return ieee754sp_zero(xs);
|
||||
}
|
||||
/* generate ipart mantissa by clearing bottom bits
|
||||
*/
|
||||
*ip = buildsp(xs, xe + SP_EBIAS,
|
||||
((xm >> (SP_MBITS - xe)) << (SP_MBITS - xe)) &
|
||||
((xm >> (SP_FBITS - xe)) << (SP_FBITS - xe)) &
|
||||
~SP_HIDDEN_BIT);
|
||||
|
||||
/* generate fpart mantissa by clearing top bits
|
||||
* and normalizing (must be able to normalize)
|
||||
*/
|
||||
xm = (xm << (32 - (SP_MBITS - xe))) >> (32 - (SP_MBITS - xe));
|
||||
xm = (xm << (32 - (SP_FBITS - xe))) >> (32 - (SP_FBITS - xe));
|
||||
if (xm == 0)
|
||||
return ieee754sp_zero(xs);
|
||||
|
||||
while ((xm >> SP_MBITS) == 0) {
|
||||
while ((xm >> SP_FBITS) == 0) {
|
||||
xm <<= 1;
|
||||
xe--;
|
||||
}
|
||||
|
@ -114,8 +114,8 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
|
||||
unsigned rm;
|
||||
|
||||
/* shunt to top of word */
|
||||
xm <<= 32 - (SP_MBITS + 1);
|
||||
ym <<= 32 - (SP_MBITS + 1);
|
||||
xm <<= 32 - (SP_FBITS + 1);
|
||||
ym <<= 32 - (SP_FBITS + 1);
|
||||
|
||||
/* multiply 32bits xm,ym to give high 32bits rm with stickness
|
||||
*/
|
||||
@ -156,12 +156,12 @@ union ieee754sp ieee754sp_mul(union ieee754sp x, union ieee754sp y)
|
||||
* sticky shift down to normal rounding precision
|
||||
*/
|
||||
if ((int) rm < 0) {
|
||||
rm = (rm >> (32 - (SP_MBITS + 1 + 3))) |
|
||||
((rm << (SP_MBITS + 1 + 3)) != 0);
|
||||
rm = (rm >> (32 - (SP_FBITS + 1 + 3))) |
|
||||
((rm << (SP_FBITS + 1 + 3)) != 0);
|
||||
re++;
|
||||
} else {
|
||||
rm = (rm >> (32 - (SP_MBITS + 1 + 3 + 1))) |
|
||||
((rm << (SP_MBITS + 1 + 3 + 1)) != 0);
|
||||
rm = (rm >> (32 - (SP_FBITS + 1 + 3 + 1))) |
|
||||
((rm << (SP_FBITS + 1 + 3 + 1)) != 0);
|
||||
}
|
||||
assert(rm & (SP_HIDDEN_BIT << 3));
|
||||
|
||||
|
@ -153,7 +153,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
|
||||
xe = xe;
|
||||
xs = xs;
|
||||
|
||||
if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
|
||||
if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
|
||||
SPXSRSX1(); /* shift preserving sticky */
|
||||
}
|
||||
} else {
|
||||
@ -174,7 +174,7 @@ union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
|
||||
}
|
||||
/* normalize to rounding precision
|
||||
*/
|
||||
while ((xm >> (SP_MBITS + 3)) == 0) {
|
||||
while ((xm >> (SP_FBITS + 3)) == 0) {
|
||||
xm <<= 1;
|
||||
xe--;
|
||||
}
|
||||
|
@ -57,8 +57,8 @@ int ieee754sp_tint(union ieee754sp x)
|
||||
return ieee754si_xcpt(ieee754si_indef(), "sp_tint", x);
|
||||
}
|
||||
/* oh gawd */
|
||||
if (xe > SP_MBITS) {
|
||||
xm <<= xe - SP_MBITS;
|
||||
if (xe > SP_FBITS) {
|
||||
xm <<= xe - SP_FBITS;
|
||||
} else {
|
||||
u32 residue;
|
||||
int round;
|
||||
@ -75,10 +75,10 @@ int ieee754sp_tint(union ieee754sp x)
|
||||
* so we do it in two steps. Be aware that xe
|
||||
* may be -1 */
|
||||
residue = xm << (xe + 1);
|
||||
residue <<= 31 - SP_MBITS;
|
||||
residue <<= 31 - SP_FBITS;
|
||||
round = (residue >> 31) != 0;
|
||||
sticky = (residue << 1) != 0;
|
||||
xm >>= SP_MBITS - xe;
|
||||
xm >>= SP_FBITS - xe;
|
||||
}
|
||||
odd = (xm & 0x1) != 0x0;
|
||||
switch (ieee754_csr.rm) {
|
||||
|
@ -57,9 +57,9 @@ s64 ieee754sp_tlong(union ieee754sp x)
|
||||
return ieee754di_xcpt(ieee754di_indef(), "sp_tlong", x);
|
||||
}
|
||||
/* oh gawd */
|
||||
if (xe > SP_MBITS) {
|
||||
xm <<= xe - SP_MBITS;
|
||||
} else if (xe < SP_MBITS) {
|
||||
if (xe > SP_FBITS) {
|
||||
xm <<= xe - SP_FBITS;
|
||||
} else if (xe < SP_FBITS) {
|
||||
u32 residue;
|
||||
int round;
|
||||
int sticky;
|
||||
@ -71,10 +71,10 @@ s64 ieee754sp_tlong(union ieee754sp x)
|
||||
sticky = residue != 0;
|
||||
xm = 0;
|
||||
} else {
|
||||
residue = xm << (32 - SP_MBITS + xe);
|
||||
residue = xm << (32 - SP_FBITS + xe);
|
||||
round = (residue >> 31) != 0;
|
||||
sticky = (residue << 1) != 0;
|
||||
xm >>= SP_MBITS - xe;
|
||||
xm >>= SP_FBITS - xe;
|
||||
}
|
||||
odd = (xm & 0x1) != 0x0;
|
||||
switch (ieee754_csr.rm) {
|
||||
|
Loading…
Reference in New Issue
Block a user