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tg3: Use NET_IP_ALIGN
This patch replaces hardcoded 2's with the NET_IP_ALIGN constant or TG3_RAW_IP_ALIGN where appropriate. Some platforms can redefine the NET_IP_ALIGN definition to zero if unaligned DMA transfers cost more than the IP header alignment gains. This patch represents a performance improvement when using the 5701 on these platforms. The copy path can be avoided. TG3_RAW_IP_ALIGN is used in cases where we always want to align the IP header on dword boundaries. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -132,6 +132,8 @@
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/* minimum number of free TX descriptors required to wake up TX process */
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#define TG3_TX_WAKEUP_THRESH(tp) ((tp)->tx_pending / 4)
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#define TG3_RAW_IP_ALIGN 2
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/* number of ETHTOOL_GSTATS u64's */
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#define TG3_NUM_STATS (sizeof(struct tg3_ethtool_stats)/sizeof(u64))
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@ -4231,12 +4233,15 @@ static int tg3_rx(struct tg3 *tp, int budget)
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goto next_pkt;
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}
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len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; /* omit crc */
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len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) -
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ETH_FCS_LEN;
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if (len > RX_COPY_THRESHOLD
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&& tp->rx_offset == 2
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/* rx_offset != 2 iff this is a 5701 card running
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* in PCI-X mode [see tg3_get_invariants()] */
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&& tp->rx_offset == NET_IP_ALIGN
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/* rx_offset will likely not equal NET_IP_ALIGN
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* if this is a 5701 card running in PCI-X mode
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* [see tg3_get_invariants()]
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*/
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) {
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int skb_size;
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@ -4256,11 +4261,12 @@ static int tg3_rx(struct tg3 *tp, int budget)
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tg3_recycle_rx(tp, opaque_key,
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desc_idx, *post_ptr);
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copy_skb = netdev_alloc_skb(tp->dev, len + 2);
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copy_skb = netdev_alloc_skb(tp->dev,
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len + TG3_RAW_IP_ALIGN);
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if (copy_skb == NULL)
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goto drop_it_no_recycle;
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skb_reserve(copy_skb, 2);
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skb_reserve(copy_skb, TG3_RAW_IP_ALIGN);
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skb_put(copy_skb, len);
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pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
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skb_copy_from_linear_data(skb, copy_skb->data, len);
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@ -12614,7 +12620,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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else
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tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
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tp->rx_offset = 2;
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tp->rx_offset = NET_IP_ALIGN;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
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(tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0)
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tp->rx_offset = 0;
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