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drivers/soc/litex: remove 8-bit subregister option
Since upstream LiteX recommends that Linux support be limited to designs configured with 32-bit CSR subregisters (see commit a2b71fde in upstream LiteX, https://github.com/enjoy-digital/litex), remove the option to select 8-bit subregisters, significantly reducing the complexity of LiteX CSR (MMIO register) accessor methods. NOTE: for details on the underlying mechanics of LiteX CSR registers, see https://github.com/enjoy-digital/litex/wiki/CSR-Bus or the original LiteX accessors (litex/soc/software/include/hw/common.h in the upstream repository). Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> Cc: Stafford Horne <shorne@gmail.com> Cc: Florent Kermarrec <florent@enjoy-digital.fr> Cc: Mateusz Holenko <mholenko@antmicro.com> Cc: Joel Stanley <joel@jms.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Stafford Horne <shorne@gmail.com>
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@ -17,16 +17,4 @@ config LITEX_SOC_CONTROLLER
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All drivers that use functions from litex.h must depend on
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LITEX.
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config LITEX_SUBREG_SIZE
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int "Size of a LiteX CSR subregister, in bytes"
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depends on LITEX
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range 1 4
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default 4
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help
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LiteX MMIO registers (referred to as Configuration and Status
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registers, or CSRs) are spread across adjacent 8- or 32-bit
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subregisters, located at 32-bit aligned MMIO addresses. Use
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this to select the appropriate size (1 or 4 bytes) matching
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your particular LiteX build.
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endmenu
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@ -62,8 +62,7 @@ static int litex_check_csr_access(void __iomem *reg_addr)
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/* restore original value of the SCRATCH register */
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litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_REG_VALUE);
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pr_info("LiteX SoC Controller driver initialized: subreg:%d, align:%d",
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LITEX_SUBREG_SIZE, LITEX_SUBREG_ALIGN);
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pr_info("LiteX SoC Controller driver initialized");
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return 0;
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}
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@ -11,18 +11,6 @@
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#include <linux/io.h>
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/* LiteX SoCs support 8- or 32-bit CSR Bus data width (i.e., subreg. size) */
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#if defined(CONFIG_LITEX_SUBREG_SIZE) && \
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(CONFIG_LITEX_SUBREG_SIZE == 1 || CONFIG_LITEX_SUBREG_SIZE == 4)
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#define LITEX_SUBREG_SIZE CONFIG_LITEX_SUBREG_SIZE
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#else
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#error LiteX subregister size (LITEX_SUBREG_SIZE) must be 4 or 1!
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#endif
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#define LITEX_SUBREG_SIZE_BIT (LITEX_SUBREG_SIZE * 8)
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/* LiteX subregisters of any width are always aligned on a 4-byte boundary */
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#define LITEX_SUBREG_ALIGN 0x4
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static inline void _write_litex_subregister(u32 val, void __iomem *addr)
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{
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writel((u32 __force)cpu_to_le32(val), addr);
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@ -42,115 +30,54 @@ static inline u32 _read_litex_subregister(void __iomem *addr)
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* 32-bit wide logical CSR will be laid out as four 32-bit physical
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* subregisters, each one containing one byte of meaningful data.
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*
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* For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which
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* means that only larger-than-32-bit CSRs will be split across multiple
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* subregisters (e.g., a 64-bit CSR will be spread across two consecutive
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* 32-bit subregisters).
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*
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* For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus
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*/
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/* number of LiteX subregisters needed to store a register of given reg_size */
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#define _litex_num_subregs(reg_size) \
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(((reg_size) - 1) / LITEX_SUBREG_SIZE + 1)
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/*
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* since the number of 4-byte aligned subregisters required to store a single
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* LiteX CSR (MMIO) register varies with LITEX_SUBREG_SIZE, the offset of the
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* next adjacent LiteX CSR register w.r.t. the offset of the current one also
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* depends on how many subregisters the latter is spread across
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*/
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#define _next_reg_off(off, size) \
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((off) + _litex_num_subregs(size) * LITEX_SUBREG_ALIGN)
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/*
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* The purpose of `_litex_[set|get]_reg()` is to implement the logic of
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* writing to/reading from the LiteX CSR in a single place that can be then
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* reused by all LiteX drivers via the `litex_[write|read][8|16|32|64]()`
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* accessors for the appropriate data width.
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* NOTE: direct use of `_litex_[set|get]_reg()` by LiteX drivers is strongly
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* discouraged, as they perform no error checking on the requested data width!
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*/
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/**
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* _litex_set_reg() - Writes a value to the LiteX CSR (Control&Status Register)
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* @reg: Address of the CSR
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* @reg_size: The width of the CSR expressed in the number of bytes
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* @val: Value to be written to the CSR
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*
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* This function splits a single (possibly multi-byte) LiteX CSR write into
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* a series of subregister writes with a proper offset.
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* NOTE: caller is responsible for ensuring (0 < reg_size <= sizeof(u64)).
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*/
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static inline void _litex_set_reg(void __iomem *reg, size_t reg_size, u64 val)
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{
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u8 shift = _litex_num_subregs(reg_size) * LITEX_SUBREG_SIZE_BIT;
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while (shift > 0) {
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shift -= LITEX_SUBREG_SIZE_BIT;
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_write_litex_subregister(val >> shift, reg);
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reg += LITEX_SUBREG_ALIGN;
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}
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}
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/**
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* _litex_get_reg() - Reads a value of the LiteX CSR (Control&Status Register)
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* @reg: Address of the CSR
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* @reg_size: The width of the CSR expressed in the number of bytes
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*
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* Return: Value read from the CSR
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*
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* This function generates a series of subregister reads with a proper offset
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* and joins their results into a single (possibly multi-byte) LiteX CSR value.
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* NOTE: caller is responsible for ensuring (0 < reg_size <= sizeof(u64)).
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*/
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static inline u64 _litex_get_reg(void __iomem *reg, size_t reg_size)
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{
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u64 r;
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u8 i;
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r = _read_litex_subregister(reg);
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for (i = 1; i < _litex_num_subregs(reg_size); i++) {
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r <<= LITEX_SUBREG_SIZE_BIT;
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reg += LITEX_SUBREG_ALIGN;
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r |= _read_litex_subregister(reg);
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}
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return r;
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}
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static inline void litex_write8(void __iomem *reg, u8 val)
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{
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_litex_set_reg(reg, sizeof(u8), val);
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_write_litex_subregister(val, reg);
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}
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static inline void litex_write16(void __iomem *reg, u16 val)
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{
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_litex_set_reg(reg, sizeof(u16), val);
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_write_litex_subregister(val, reg);
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}
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static inline void litex_write32(void __iomem *reg, u32 val)
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{
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_litex_set_reg(reg, sizeof(u32), val);
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_write_litex_subregister(val, reg);
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}
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static inline void litex_write64(void __iomem *reg, u64 val)
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{
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_litex_set_reg(reg, sizeof(u64), val);
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_write_litex_subregister(val >> 32, reg);
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_write_litex_subregister(val, reg + 4);
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}
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static inline u8 litex_read8(void __iomem *reg)
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{
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return _litex_get_reg(reg, sizeof(u8));
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return _read_litex_subregister(reg);
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}
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static inline u16 litex_read16(void __iomem *reg)
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{
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return _litex_get_reg(reg, sizeof(u16));
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return _read_litex_subregister(reg);
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}
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static inline u32 litex_read32(void __iomem *reg)
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{
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return _litex_get_reg(reg, sizeof(u32));
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return _read_litex_subregister(reg);
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}
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static inline u64 litex_read64(void __iomem *reg)
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{
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return _litex_get_reg(reg, sizeof(u64));
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return ((u64)_read_litex_subregister(reg) << 32) |
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_read_litex_subregister(reg + 4);
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}
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#endif /* _LINUX_LITEX_H */
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