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drm/amdgpu/virt: change the place of virt_init_setting
Change place of virt_init_setting function so that can cover the cg and pg flags configuration. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -531,11 +531,6 @@ static int soc15_common_early_init(void *handle)
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(amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_PSP)))
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psp_enabled = true;
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if (amdgpu_sriov_vf(adev)) {
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amdgpu_virt_init_setting(adev);
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xgpu_ai_mailbox_set_irq_funcs(adev);
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}
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/*
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* nbio need be used for both sdma and gfx9, but only
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* initializes once
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@ -579,6 +574,11 @@ static int soc15_common_early_init(void *handle)
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return -EINVAL;
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}
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if (amdgpu_sriov_vf(adev)) {
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amdgpu_virt_init_setting(adev);
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xgpu_ai_mailbox_set_irq_funcs(adev);
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}
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adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);
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amdgpu_get_pcie_info(adev);
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@ -894,11 +894,6 @@ static int vi_common_early_init(void *handle)
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(amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_SMC)))
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smc_enabled = true;
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if (amdgpu_sriov_vf(adev)) {
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amdgpu_virt_init_setting(adev);
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xgpu_vi_mailbox_set_irq_funcs(adev);
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}
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adev->rev_id = vi_get_rev_id(adev);
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adev->external_rev_id = 0xFF;
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switch (adev->asic_type) {
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@ -1071,6 +1066,11 @@ static int vi_common_early_init(void *handle)
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return -EINVAL;
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}
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if (amdgpu_sriov_vf(adev)) {
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amdgpu_virt_init_setting(adev);
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xgpu_vi_mailbox_set_irq_funcs(adev);
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}
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/* vi use smc load by default */
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adev->firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);
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