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Allwinner Fixes for v5.6
A pretty normal set of fixes for v5.6: - Fix reversed macros used for A83T EMAC clock and reset - Fix camera regulator voltage and USB OTG for TBS-A711 - 16-bit / 8-bit mixed read fix for our RSB driver - Fix SPI controller base address for R40 - Reorder device nodes based on base address for R40 -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAl5rGFcOHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDC7ehAAjd+M6e4/XPSJvR6w5EOSbbZ7lJbW916+I4TK vFvwyow4YQX7ryE6ivq0ytGYA2THJQI8TSxhaeLUVNF64TnG6LzsXIyyqPRVyav+ AxIB2tQWWnemcVPfS1CobRF3FXng1hBzs2ooaGb3N9ois1wcVTqHvcOxkvaNvZ3s 0q8tIAmvnkBiqBESdcwz3hjYZqhcbkj3qra73xJVy7BmwOhsBquEYbeCmO2eyqdO FjhWpE5BuR/4D3UZYrVnhz+r+6LSWlM/Bc8MfAOmtFHrYJkcFLF5CYqctGzPyjkS sPWtmHKszJfep7u8PHVvEsM7T9EXjtj/B2/z3ms0Z8YnWiEMkBB9qfc9dnvdy0QI TAod6n4i2r2Jf8lFVSnDYEGBa2+vD3D6ySG5vAi4PzkErF+eO9Av3t/JUeco2uWY uD7UROyK+34kxPcn+RYkcudnTqPyAmSiAPE9xBOM9qIzaEXk9bwrdI4bA+LVtoYX y2/c1MC3j4iM+7Xa7UxSkclmDi8Pty++wwtTX6g8MAzEhncx52SALa2mmm6LCSNc Z2zOBy1SFkzi71c11GZCzMu8cV+W6R9wXQ8x2hfqqngPDrXBUgnKy6jpCEzF/NCm O1JYtwRHslMEsRwR+Co/4Av/Smt20qC1peVjQe93OLWOYTj3YAdLTVR9sd3DLcLd S4DkeJ0= =yBY0 -----END PGP SIGNATURE----- Merge tag 'sunxi-fixes-for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes Allwinner Fixes for v5.6 A pretty normal set of fixes for v5.6: - Fix reversed macros used for A83T EMAC clock and reset - Fix camera regulator voltage and USB OTG for TBS-A711 - 16-bit / 8-bit mixed read fix for our RSB driver - Fix SPI controller base address for R40 - Reorder device nodes based on base address for R40 * tag 'sunxi-fixes-for-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: r40: Move SPI device nodes based on address order ARM: dts: sun8i: r40: Fix register base address for SPI2 and SPI3 ARM: dts: sun8i: r40: Move AHCI device node based on address order bus: sunxi-rsb: Return correct data when mixing 16-bit and 8-bit reads ARM: dts: sun8i-a83t-tbs-a711: Fix USB OTG mode detection ARM: dts: sun8i-a83t-tbs-a711: HM5065 doesn't like such a high voltage ARM: dts: sun8i: a83t: Fix incorrect clk and reset macros for EMAC device Link: https://lore.kernel.org/r/20200313055233.GA19649@wens.csie.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
aafd017347
@ -374,8 +374,8 @@
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};
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®_dldo3 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vdd-csi";
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};
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@ -498,7 +498,8 @@
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};
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&usbphy {
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usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
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usb0_id_det-gpios = <&pio 7 11 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH11 */
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usb0_vbus_power-supply = <&usb_power_supply>;
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usb0_vbus-supply = <®_drivevbus>;
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usb1_vbus-supply = <®_vmain>;
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usb2_vbus-supply = <®_vmain>;
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@ -1006,10 +1006,10 @@
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reg = <0x01c30000 0x104>;
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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resets = <&ccu CLK_BUS_EMAC>;
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reset-names = "stmmaceth";
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clocks = <&ccu RST_BUS_EMAC>;
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clocks = <&ccu CLK_BUS_EMAC>;
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clock-names = "stmmaceth";
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resets = <&ccu RST_BUS_EMAC>;
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reset-names = "stmmaceth";
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status = "disabled";
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mdio: mdio {
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@ -181,6 +181,32 @@
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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};
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spi0: spi@1c05000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c05000 0x1000>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI0>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@1c06000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c06000 0x1000>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI1>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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csi0: csi@1c09000 {
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compatible = "allwinner,sun8i-r40-csi0",
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"allwinner,sun7i-a20-csi0";
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@ -290,6 +316,29 @@
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resets = <&ccu RST_BUS_CE>;
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};
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spi2: spi@1c17000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c17000 0x1000>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI2>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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ahci: sata@1c18000 {
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compatible = "allwinner,sun8i-r40-ahci";
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reg = <0x01c18000 0x1000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
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resets = <&ccu RST_BUS_SATA>;
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reset-names = "ahci";
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status = "disabled";
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};
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ehci1: usb@1c19000 {
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compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
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reg = <0x01c19000 0x100>;
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@ -336,6 +385,19 @@
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status = "disabled";
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};
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spi3: spi@1c1f000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c1f000 0x1000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI3>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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ccu: clock@1c20000 {
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compatible = "allwinner,sun8i-r40-ccu";
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reg = <0x01c20000 0x400>;
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@ -653,69 +715,6 @@
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#size-cells = <0>;
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};
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spi0: spi@1c05000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c05000 0x1000>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI0>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@1c06000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c06000 0x1000>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI1>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi2: spi@1c07000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c07000 0x1000>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI2>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi3: spi@1c0f000 {
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compatible = "allwinner,sun8i-r40-spi",
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"allwinner,sun8i-h3-spi";
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reg = <0x01c0f000 0x1000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_SPI3>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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ahci: sata@1c18000 {
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compatible = "allwinner,sun8i-r40-ahci";
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reg = <0x01c18000 0x1000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
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resets = <&ccu RST_BUS_SATA>;
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reset-names = "ahci";
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status = "disabled";
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};
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gmac: ethernet@1c50000 {
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compatible = "allwinner,sun8i-r40-gmac";
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syscon = <&ccu>;
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@ -345,7 +345,7 @@ static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
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if (ret)
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goto unlock;
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*buf = readl(rsb->regs + RSB_DATA);
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*buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
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unlock:
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mutex_unlock(&rsb->lock);
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