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mtd: nand: omap2: Support parsing dma channel information from DT

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Switch from dma_request_channel to allow passing dma channel
information from DT rather than hardcoding a value.

Also provide a handle to the GPMC's dev so it can be used to parse the DMA
channel information within the GPMC's DT node.

Performance Numbers via mtd_speedtest now that EDMA based prefetch works:

AM335x Performance numbers:
DMA
  CPULOAD Write: 54%  Read: 35%
  page write speed	-23% (vs non dma)
  page read speed	-35% (vs non dma)

NO DMA (prefetch-polled)
  CPULOAD Write: 98%  Read: 98%

AM437x Performance numbers:
DMA
  CPU LOAD Write: 56% Read: 36%
  page write speed	-16% (vs non dma)
  page read speed	-22% (vs non dma)

NO DMA (prefetch-polled)
  CPULOAD Write: 93%  Read: 93%

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
This commit is contained in:
Cooper Jr., Franklin 2016-05-04 13:34:43 -05:00 committed by Boris Brezillon
parent 1a695a905c
commit aa7abd312c
1 changed files with 2 additions and 5 deletions
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7
drivers/mtd/nand/omap2.c
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@ -118,8 +118,6 @@
#define PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F)
#define STATUS_BUFF_EMPTY 0x00000001
#define OMAP24XX_DMA_GPMC 4
#define SECTOR_BYTES 512
/* 4 bit padding to make byte aligned, 56 = 52 + 4 */
#define BCH4_BIT_PAD 4
@ -1808,7 +1806,6 @@ static int omap_nand_probe(struct platform_device *pdev)
struct nand_chip *nand_chip;
int err;
dma_cap_mask_t mask;
unsigned sig;
struct resource *res;
struct device *dev = &pdev->dev;
int min_oobbytes = BADBLOCK_MARKER_LENGTH;
@ -1921,8 +1918,8 @@ static int omap_nand_probe(struct platform_device *pdev)
case NAND_OMAP_PREFETCH_DMA:
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
sig = OMAP24XX_DMA_GPMC;
info->dma = dma_request_channel(mask, omap_dma_filter_fn, &sig);
info->dma = dma_request_chan(pdev->dev.parent, "rxtx");
if (!info->dma) {
dev_err(&pdev->dev, "DMA engine request failed\n");
err = -ENXIO;