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i.MX device tree update for 5.11:

Browse Source 
- New board support: imx6dl-alti6p, imx6dl-lanmcu, mx6qp-prtwd3,
   imx6ul-phytec-segin and imx7d-flex-concentrator.
 - Fix schema warnings for pwm-leds, watchdog and GPIO hog devices.
 - A few patches from Krzysztof Kozlowski to correct compatibles for
   i.MX6/7 boards.
 - A series from Matthias Schiffer to polish imx7-mba7 board support.
 - Update i.MX6/7 device trees for fsl,stop-mode support.
 - Correct fsl,rcpm-wakeup of LS1021A to get flextimer wake-up work.
 - A series of patch from Stefan Riedmueller to update phytec and segin
   devices.
 - Other small and random changes.
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Merge tag 'imx-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree update for 5.11:

- New board support: imx6dl-alti6p, imx6dl-lanmcu, mx6qp-prtwd3,
  imx6ul-phytec-segin and imx7d-flex-concentrator.
- Fix schema warnings for pwm-leds, watchdog and GPIO hog devices.
- A few patches from Krzysztof Kozlowski to correct compatibles for
  i.MX6/7 boards.
- A series from Matthias Schiffer to polish imx7-mba7 board support.
- Update i.MX6/7 device trees for fsl,stop-mode support.
- Correct fsl,rcpm-wakeup of LS1021A to get flextimer wake-up work.
- A series of patch from Stefan Riedmueller to update phytec and segin
  devices.
- Other small and random changes.

* tag 'imx-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (40 commits)
  ARM: dts: imx28: Fix label name for L2 switch
  ARM: dts: add Protonic WD3 board
  ARM: dts: imx6qdl-kontron-samx6i: increase i2c-frequency
  ARM: dts: imx7: add support for kamstrup flex concentrator
  ARM: dts: ls1021a: update calibration table for TMU module
  ARM: dts: ls1021a: fix rcpm failed to claim resource
  ARM: dts: ls1021a: fix flextimer failed to wake system
  ARM: dts: imx50-kobo-aura: Enable eKTF2132 touchscreen
  ARM: dts: imx: Change flexcan node name to "can"
  ARM: dts: imx6q-pico: fix board compatibles
  ARM: dts: add Van der Laan LANMCU board
  ARM: dts: add Altesco I6P board
  ARM: dts: imx6ul: segin: peb-av-02: Mark stmpe touch as wakeup-source
  ARM: dts: imx6ul: phytec: Add support for optional PEB-AV-02 LCD adapter
  ARM: dts: imx6ul: segin: Add phyBOARD-Segin with eMMC phyCORE-i.MX6UL
  ARM: dts: imx50-kobo-aura: Add 'grp' suffix to pinctrl node names
  ARM: dts: imx: add usb alias
  ARM: dts: imx6/7: sync fsl,stop-mode with current flexcan driver
  ARM: dts: imx: Fix schema warnings for pwm-leds
  ARM: dts: imx7s-warp: correct vendor in compatible to Element14
  ...

Link: https://lore.kernel.org/r/20201202142717.9262-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-12-08 23:58:19 +01:00
commit aa66be3bff
60 changed files with 2442 additions and 193 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/Makefile
View File

@ -418,6 +418,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
imx53-usbarmory.dtb \
imx53-voipac-bsb.dtb
dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-alti6p.dtb \
imx6dl-apf6dev.dtb \
imx6dl-aristainetos_4.dtb \
imx6dl-aristainetos_7.dtb \
@ -454,6 +455,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-lanmcu.dtb \
imx6dl-mamoj.dtb \
imx6dl-nit6xlite.dtb \
imx6dl-nitrogen6x.dtb \
@ -585,6 +587,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6qp-nitrogen6_max.dtb \
imx6qp-nitrogen6_som2.dtb \
imx6qp-phytec-mira-rdk-nand.dtb \
imx6qp-prtwd3.dtb \
imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb \
imx6qp-tx6qp-8037.dtb \
@ -626,6 +629,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-pico-dwarf.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-pico-pi.dtb \
imx6ul-phytec-segin-ff-rdk-emmc.dtb \
imx6ul-phytec-segin-ff-rdk-nand.dtb \
imx6ul-tx6ul-0010.dtb \
imx6ul-tx6ul-0011.dtb \
@ -645,6 +649,8 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-colibri-emmc-aster.dtb \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7d-flex-concentrator.dtb \
imx7d-flex-concentrator-mfg.dtb \
imx7d-mba7.dtb \
imx7d-meerkat96.dtb \
imx7d-nitrogen7.dtb \

2
arch/arm/boot/dts/imx25.dtsi
View File

@ -525,7 +525,7 @@
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
};
wdog@53fdc000 {
watchdog@53fdc000 {
compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 126>;

2
arch/arm/boot/dts/imx27.dtsi
View File

@ -99,7 +99,7 @@
#dma-channels = <16>;
};
wdog: wdog@10002000 {
wdog: watchdog@10002000 {
compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
reg = <0x10002000 0x1000>;
interrupts = <27>;

2
arch/arm/boot/dts/imx28.dtsi
View File

@ -1317,7 +1317,7 @@
status = "disabled";
};
etn_switch: switch@800f8000 {
eth_switch: switch@800f8000 {
reg = <0x800f8000 0x8000>;
status = "disabled";
};

3
arch/arm/boot/dts/imx31.dtsi
View File

@ -315,10 +315,11 @@
clock-names = "ref", "ipg";
};
wdog: wdog@53fdc000 {
wdog: watchdog@53fdc000 {
compatible = "fsl,imx31-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 41>;
interrupts = <55>;
};
pwm: pwm@53fe0000 {

2
arch/arm/boot/dts/imx35.dtsi
View File

@ -294,7 +294,7 @@
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
};
wdog: wdog@53fdc000 {
wdog: watchdog@53fdc000 {
compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
reg = <0x53fdc000 0x4000>;
clocks = <&clks 74>;

41
arch/arm/boot/dts/imx50-kobo-aura.dts
View File

@ -6,6 +6,7 @@
/dts-v1/;
#include "imx50.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Kobo Aura (N514)";
@ -119,7 +120,14 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
/* TODO: ektf2132 touch controller at 0x15 */
touchscreen@15 {
reg = <0x15>;
compatible = "elan,ektf2132";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ts>;
power-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
interrupts-extended = <&gpio5 13 IRQ_TYPE_EDGE_FALLING>;
};
};
&i2c2 {
@ -139,7 +147,7 @@
};
&iomuxc {
pinctrl_gpiokeys: gpiokeys {
pinctrl_gpiokeys: gpiokeysgrp {
fsl,pins = <
MX50_PAD_CSPI_MISO__GPIO4_10 0x0
MX50_PAD_SD2_D7__GPIO5_15 0x0
@ -147,34 +155,34 @@
>;
};
pinctrl_i2c1: i2c1 {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX50_PAD_I2C1_SCL__I2C1_SCL 0x400001fd
MX50_PAD_I2C1_SDA__I2C1_SDA 0x400001fd
>;
};
pinctrl_i2c2: i2c2 {
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX50_PAD_I2C2_SCL__I2C2_SCL 0x400001fd
MX50_PAD_I2C2_SDA__I2C2_SDA 0x400001fd
>;
};
pinctrl_i2c3: i2c3 {
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX50_PAD_I2C3_SCL__I2C3_SCL 0x400001fd
MX50_PAD_I2C3_SDA__I2C3_SDA 0x400001fd
>;
};
pinctrl_leds: leds {
pinctrl_leds: ledsgrp {
fsl,pins = <
MX50_PAD_PWM1__GPIO6_24 0x0
>;
};
pinctrl_sd1: sd1 {
pinctrl_sd1: sd1grp {
fsl,pins = <
MX50_PAD_SD1_CMD__ESDHC1_CMD 0x1e4
MX50_PAD_SD1_CLK__ESDHC1_CLK 0xd4
@ -187,7 +195,7 @@
>;
};
pinctrl_sd2: sd2 {
pinctrl_sd2: sd2grp {
fsl,pins = <
MX50_PAD_SD2_CMD__ESDHC2_CMD 0x1e4
MX50_PAD_SD2_CLK__ESDHC2_CLK 0xd4
@ -198,19 +206,19 @@
>;
};
pinctrl_sd2_reset: sd2-reset {
pinctrl_sd2_reset: sd2-resetgrp {
fsl,pins = <
MX50_PAD_ECSPI2_MOSI__GPIO4_17 0x0
>;
};
pinctrl_sd2_vmmc: sd2-vmmc {
pinctrl_sd2_vmmc: sd2-vmmcgrp {
fsl,pins = <
MX50_PAD_ECSPI1_SCLK__GPIO4_12 0x0
>;
};
pinctrl_sd3: sd3 {
pinctrl_sd3: sd3grp {
fsl,pins = <
MX50_PAD_SD3_CMD__ESDHC3_CMD 0x1e4
MX50_PAD_SD3_CLK__ESDHC3_CLK 0xd4
@ -225,14 +233,21 @@
>;
};
pinctrl_uart2: uart2 {
pinctrl_ts: tsgrp {
fsl,pins = <
MX50_PAD_CSPI_MOSI__GPIO4_9 0x0
MX50_PAD_SD2_D5__GPIO5_13 0x0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX50_PAD_UART2_TXD__UART2_TXD_MUX 0x1e4
MX50_PAD_UART2_RXD__UART2_RXD_MUX 0x1e4
>;
};
pinctrl_usbphy: usbphy {
pinctrl_usbphy: usbphygrp {
fsl,pins = <
MX50_PAD_ECSPI2_SS0__GPIO4_19 0x0
>;

2
arch/arm/boot/dts/imx50.dtsi
View File

@ -267,7 +267,7 @@
<&iomuxc 20 140 11>;
};
wdog1: wdog@53f98000 {
wdog1: watchdog@53f98000 {
compatible = "fsl,imx50-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>;
interrupts = <58>;

2
arch/arm/boot/dts/imx51-zii-rdu1.dts
View File

@ -451,7 +451,7 @@
"", "", "", "",
"", "", "", "";
unused-sd3-wp-gpio {
unused-sd3-wp-hog {
/*
* See pinctrl_esdhc1 below for more details on this
*/

4
arch/arm/boot/dts/imx51.dtsi
View File

@ -370,14 +370,14 @@
status = "disabled";
};
wdog1: wdog@73f98000 {
wdog1: watchdog@73f98000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f98000 0x4000>;
interrupts = <58>;
clocks = <&clks IMX5_CLK_DUMMY>;
};
wdog2: wdog@73f9c000 {
wdog2: watchdog@73f9c000 {
compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
reg = <0x73f9c000 0x4000>;
interrupts = <59>;

15
arch/arm/boot/dts/imx53-ppd.dts
View File

@ -176,36 +176,37 @@
power-supply = <&reg_3v3_lcd>;
};
leds-brightness {
led-controller-1 {
compatible = "pwm-leds";
alarm-brightness {
led-1 {
label = "alarm-brightness";
pwms = <&pwm1 0 100000>;
max-brightness = <255>;
};
};
leds {
led-controller-2 {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_alarmled_pins>;
alarm1 {
led-2 {
label = "alarm:red";
gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
};
alarm2 {
led-3 {
label = "alarm:yellow";
gpios = <&gpio7 7 GPIO_ACTIVE_HIGH>;
};
alarm3 {
led-4 {
label = "alarm:blue";
gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
};
alarm4 {
led-5 {
label = "alarm:silenced";
gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>;
};

4
arch/arm/boot/dts/imx53.dtsi
View File

@ -427,14 +427,14 @@
status = "disabled";
};
wdog1: wdog@53f98000 {
wdog1: watchdog@53f98000 {
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f98000 0x4000>;
interrupts = <58>;
clocks = <&clks IMX5_CLK_DUMMY>;
};
wdog2: wdog@53f9c000 {
wdog2: watchdog@53f9c000 {
compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
reg = <0x53f9c000 0x4000>;
interrupts = <59>;

564
arch/arm/boot/dts/imx6dl-alti6p.dts Normal file
View File

@ -0,0 +1,564 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2016 Protonic Holland
* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
#include "imx6dl.dtsi"
/ {
model = "Altesco I6P Board";
compatible = "alt,alti6p", "fsl,imx6dl";
chosen {
stdout-path = &uart4;
};
clock_ksz8081: clock-ksz8081 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
i2c2-mux {
compatible = "i2c-mux";
i2c-parent = <&i2c2>;
mux-controls = <&i2c_mux>;
#address-cells = <1>;
#size-cells = <0>;
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
};
i2c4-mux {
compatible = "i2c-mux";
i2c-parent = <&i2c4>;
mux-controls = <&i2c_mux>;
#address-cells = <1>;
#size-cells = <0>;
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
led-debug0 {
function = LED_FUNCTION_STATUS;
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-debug1 {
function = LED_FUNCTION_SD;
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
};
};
i2c_mux: mux-controller {
compatible = "gpio-mux";
#mux-control-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2cmux>;
mux-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>,
<&gpio5 11 GPIO_ACTIVE_HIGH>;
};
reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_h1_vbus: regulator-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "h1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_otg_vbus: regulator-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "otg-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "prti6q-sgtl5000";
simple-audio-card,format = "i2s";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Line", "Line In Jack",
"Headphone", "Headphone Jack",
"Speaker", "External Speaker";
simple-audio-card,routing =
"MIC_IN", "Microphone Jack",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT",
"External Speaker", "LINE_OUT";
simple-audio-card,cpu {
sound-dai = <&ssi1>;
system-clock-frequency = <0>;
};
simple-audio-card,codec {
sound-dai = <&sgtl5000>;
bitclock-master;
frame-master;
};
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
mux-ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN 0
IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
IMX_AUDMUX_V2_PTCR_TFSDIR 0
IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
mux-pins3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
0 IMX_AUDMUX_V2_PDCR_TXRXEN
>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1>;
xceiver-supply = <&reg_5v0>;
status = "okay";
};
&ecspi1 {
cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clock_ksz8081>;
clock-names = "ipg", "ahb", "ptp";
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* Microchip KSZ8081RNA PHY */
rgmii_phy: ethernet-phy@0 {
reg = <0>;
interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <300>;
};
};
};
&gpio1 {
gpio-line-names =
"", "SD1_CD", "", "USB_H1_OC", "", "", "", "",
"DEBUG_0", "DEBUG_1", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "ECSPI1_SS1", "", "USB_EXT1_OC", "USB_EXT1_PWR", "",
"", "", "", "", "", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "ETH_RESET", "", "", "BUZZER", "ETH_INTRP", "";
};
&gpio5 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "I2C_EN13", "I2C_EN24", "", "", "", "",
"", "", "", "", "", "AUDIO_RESET", "", "",
"", "", "", "", "", "", "", "";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi>;
ddc-i2c-bus = <&i2c1>;
status = "okay";
};
/* DDC */
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
sgtl5000: audio-codec@a {
compatible = "fsl,sgtl5000";
reg = <0xa>;
#sound-dai-cells = <0>;
clocks = <&clks 201>;
VDDA-supply = <&reg_3v3>;
VDDIO-supply = <&reg_3v3>;
VDDD-supply = <&reg_1v8>;
};
/* additional i2c devices are added automatically by the boot loader */
};
&i2c2 {
clock-frequency = <50000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
/* external interface, device are configured from user space */
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
temperature-sensor@70 {
compatible = "ti,tmp103";
reg = <0x70>;
};
};
&i2c4 {
clock-frequency = <50000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&ssi1 {
#sound-dai-cells = <0>;
fsl,mode = "ac97-slave";
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_h1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
phy_type = "utmi";
dr_mode = "host";
status = "okay";
};
&usbotg {
vbus-supply = <&reg_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
no-1-8-v;
disable-wp;
cap-sd-highspeed;
no-mmc;
no-sdio;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
no-1-8-v;
non-removable;
no-sd;
no-sdio;
status = "okay";
};
&iomuxc {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>;
};
pinctrl_can1: can1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
/* CS */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
/* MX6QDL_ENET_PINGRP4 */
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
/* Phy reset */
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0
/* nINTRP */
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
>;
};
pinctrl_hdmi: hdmigrp {
fsl,pins = <
/* NOTE: DDC is done via I2C2, so DON'T configure DDC
* pins for HDMI!
*/
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6QDL_PAD_NANDF_CS3__I2C4_SDA 0x4001f8b1
MX6QDL_PAD_NANDF_WP_B__I2C4_SCL 0x4001f8b1
>;
};
pinctrl_i2cmux: i2cmuxgrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b0
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b0
>;
};
pinctrl_leds: ledsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x8
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
pinctrl_usbh1: usbh1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1B058
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1B058
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
>;
};
};

2
arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
View File

@ -46,7 +46,7 @@
/ {
model = "aristainetos2 i.MX6 Dual Lite Board 4";
compatible = "fsl,imx6dl";
compatible = "abb,aristainetos2-imx6dl-4", "fsl,imx6dl";
memory@10000000 {
device_type = "memory";

2
arch/arm/boot/dts/imx6dl-aristainetos2_7.dts
View File

@ -46,7 +46,7 @@
/ {
model = "aristainetos2 i.MX6 Dual Lite Board 7";
compatible = "fsl,imx6dl";
compatible = "abb,aristainetos2-imx6dl-7", "fsl,imx6dl";
memory@10000000 {
device_type = "memory";

2
arch/arm/boot/dts/imx6dl-aristainetos_4.dts
View File

@ -10,7 +10,7 @@
/ {
model = "aristainetos i.MX6 Dual Lite Board 4";
compatible = "fsl,imx6dl";
compatible = "abb,aristainetos-imx6dl-4", "fsl,imx6dl";
backlight {
compatible = "pwm-backlight";

2
arch/arm/boot/dts/imx6dl-aristainetos_7.dts
View File

@ -10,7 +10,7 @@
/ {
model = "aristainetos i.MX6 Dual Lite Board 7";
compatible = "fsl,imx6dl";
compatible = "abb,aristainetos-imx6dl-7", "fsl,imx6dl";
memory@10000000 {
device_type = "memory";

470
arch/arm/boot/dts/imx6dl-lanmcu.dts Normal file
View File

@ -0,0 +1,470 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2019 Protonic Holland
* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "imx6dl.dtsi"
/ {
model = "Van der Laan LANMCU";
compatible = "vdl,lanmcu", "fsl,imx6dl";
chosen {
stdout-path = &uart4;
};
clock_ksz8081: clock-ksz8081 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000 0>;
brightness-levels = <0 1000>;
num-interpolated-steps = <20>;
default-brightness-level = <19>;
};
display {
compatible = "fsl,imx-parallel-display";
pinctrl-0 = <&pinctrl_ipu1_disp>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
display_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
display_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
led-0 {
label = "debug0";
function = LED_FUNCTION_STATUS;
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
panel {
compatible = "edt,etm0700g0bdh6";
backlight = <&backlight>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
reg_otg_vbus: regulator-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "otg-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi_npd>;
reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clock_ksz8081>;
clock-names = "ipg", "ahb", "ptp";
phy-handle = <&rgmii_phy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* Microchip KSZ8081RNA PHY */
rgmii_phy: ethernet-phy@0 {
reg = <0>;
interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <300>;
};
};
};
&gpio1 {
gpio-line-names =
"", "SD1_CD", "", "", "", "", "", "",
"DEBUG_0", "BL_PWM", "", "", "", "", "", "",
"", "", "", "", "", "", "", "ENET_LED_GREEN",
"", "", "", "", "", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
"", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
};
&gpio5 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "ENET_RST", "ENET_INT",
"", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
};
&gpio6 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "WLAN_REG_ON", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&gpio7 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"EMMC_RST", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
/* additional i2c devices are added automatically by the boot loader */
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ts_edt>;
interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <1792>;
touchscreen-size-y = <1024>;
touchscreen-fuzz-x = <0>;
touchscreen-fuzz-y = <0>;
/* Touch screen calibration */
threshold = <50>;
gain = <5>;
offset = <10>;
};
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&display_in>;
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
linux,rs485-enabled-at-boot-time;
uart-has-rtscts;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
linux,rs485-enabled-at-boot-time;
uart-has-rtscts;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
no-1-8-v;
disable-wp;
cap-sd-highspeed;
no-mmc;
no-sdio;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
no-1-8-v;
non-removable;
mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
no-1-8-v;
non-removable;
no-sd;
no-sdio;
status = "okay";
};
&iomuxc {
pinctrl_can1: can1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
>;
};
pinctrl_can2: can2grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
/* MX6QDL_ENET_PINGRP4 */
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
/* Phy reset */
MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
/* nINTRP */
MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_ipu1_disp: ipudisp1grp {
fsl,pins = <
/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
>;
};
pinctrl_leds: ledsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
>;
};
pinctrl_ts_edt: ts1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x130b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x130b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
/* power enable, high active */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b0
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
>;
};
pinctrl_wifi_npd: wifigrp {
fsl,pins = <
/* WL_REG_ON */
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
>;
};
};

2
arch/arm/boot/dts/imx6dl-pico-dwarf.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and Dwarf baseboard";
compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
compatible = "technexion,imx6dl-pico-dwarf", "fsl,imx6dl";
};

2
arch/arm/boot/dts/imx6dl-pico-hobbit.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and Hobbit baseboard";
compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
compatible = "technexion,imx6dl-pico-hobbit", "fsl,imx6dl";
};

2
arch/arm/boot/dts/imx6dl-pico-nymph.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and Nymph baseboard";
compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
compatible = "technexion,imx6dl-pico-nymph", "fsl,imx6dl";
};

2
arch/arm/boot/dts/imx6dl-pico-pi.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 DualLite/Solo Board and PI baseboard";
compatible = "technexion,imx6dl-pico", "fsl,imx6dl";
compatible = "technexion,imx6dl-pico-pi", "fsl,imx6dl";
};

28
arch/arm/boot/dts/imx6q-icore-ofcap10.dts
View File

@ -12,6 +12,17 @@
/ {
model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 10.1 Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
panel {
compatible = "ampire,am-1280800n3tzqw-t00h";
backlight = <&backlight_lvds>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ldb {
@ -22,18 +33,11 @@
fsl,data-width = <24>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <60000000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <10>;
vfront-porch = <3>;
hsync-len = <80>;
vsync-len = <10>;
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};

2
arch/arm/boot/dts/imx6q-pico-dwarf.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and Dwarf baseboard";
compatible = "technexion,imx6q-pico", "fsl,imx6q";
compatible = "technexion,imx6q-pico-dwarf", "fsl,imx6q";
};

2
arch/arm/boot/dts/imx6q-pico-hobbit.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and Hobbit baseboard";
compatible = "technexion,imx6q-pico", "fsl,imx6q";
compatible = "technexion,imx6q-pico-hobbit", "fsl,imx6q";
};

2
arch/arm/boot/dts/imx6q-pico-nymph.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and Nymph baseboard";
compatible = "technexion,imx6q-pico", "fsl,imx6q";
compatible = "technexion,imx6q-pico-nymph", "fsl,imx6q";
};

2
arch/arm/boot/dts/imx6q-pico-pi.dts
View File

@ -13,5 +13,5 @@
/ {
model = "TechNexion PICO-IMX6 Quad Board and PI baseboard";
compatible = "technexion,imx6q-pico", "fsl,imx6q";
compatible = "technexion,imx6q-pico-pi", "fsl,imx6q";
};

4
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
View File

@ -55,12 +55,12 @@
pinctrl-0 = <&pinctrl_cubox_i_ir>;
};
pwmleds {
led-controller {
compatible = "pwm-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
front {
led-1 {
active-low;
label = "imx6:red:front";
max-brightness = <248>;

6
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi
View File

@ -390,21 +390,21 @@
/* I2C_GP */
&i2c1 {
clock-frequency = <100000>;
clock-frequency = <375000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
};
/* HDMI_CTRL */
&i2c2 {
clock-frequency = <100000>;
clock-frequency = <375000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
};
/* I2C_PM */
&i2c3 {
clock-frequency = <100000>;
clock-frequency = <375000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";

3
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View File

@ -116,7 +116,8 @@
status = "okay";
som_eeprom: eeprom@50 {
compatible = "atmel,24c32";
compatible = "catalyst,24c32", "atmel,24c32";
pagesize = <32>;
reg = <0x50>;
};

3
arch/arm/boot/dts/imx6qdl-phytec-phycore-som.dtsi
View File

@ -84,7 +84,8 @@
status = "okay";
eeprom@50 {
compatible = "atmel,24c32";
compatible = "st,24c32", "atmel,24c32";
pagesize = <32>;
reg = <0x50>;
};

8
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
View File

@ -330,28 +330,28 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio3_hog>;
usb-emulation {
usb-emulation-hog {
gpio-hog;
gpios = <19 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "usb-emulation";
};
usb-mode1 {
usb-mode1-hog {
gpio-hog;
gpios = <20 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb-mode1";
};
usb-pwr {
usb-pwr-hog {
gpio-hog;
gpios = <22 GPIO_ACTIVE_LOW>;
output-high;
line-name = "usb-pwr-ctrl-en-n";
};
usb-mode2 {
usb-mode2-hog {
gpio-hog;
gpios = <23 GPIO_ACTIVE_HIGH>;
output-high;

12
arch/arm/boot/dts/imx6qdl.dtsi
View File

@ -45,6 +45,10 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg;
usb1 = &usbh1;
usb2 = &usbh2;
usb3 = &usbh3;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -542,25 +546,25 @@
status = "disabled";
};
can1: flexcan@2090000 {
can1: can@2090000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_CAN1_IPG>,
<&clks IMX6QDL_CLK_CAN1_SERIAL>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x34 28 0x10 17>;
fsl,stop-mode = <&gpr 0x34 28>;
status = "disabled";
};
can2: flexcan@2094000 {
can2: can@2094000 {
compatible = "fsl,imx6q-flexcan";
reg = <0x02094000 0x4000>;
interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_CAN2_IPG>,
<&clks IMX6QDL_CLK_CAN2_SERIAL>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x34 29 0x10 18>;
fsl,stop-mode = <&gpr 0x34 29>;
status = "disabled";
};

553
arch/arm/boot/dts/imx6qp-prtwd3.dts Normal file
View File

@ -0,0 +1,553 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2018 Protonic Holland
* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6qp.dtsi"
/ {
model = "Protonic WD3 board";
compatible = "prt,prtwd3", "fsl,imx6qp";
chosen {
stdout-path = &uart4;
};
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x20000000>;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
clock_ksz8081: clock-ksz8081 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
clock_ksz9031: clock-ksz9031 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
clock_mcp251xfd: clock-mcp251xfd {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <20000000>;
};
clock_sja1105: clock-sja1105 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
mdio {
compatible = "virtual,mdio-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio>;
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio5 6 GPIO_ACTIVE_HIGH
&gpio5 7 GPIO_ACTIVE_HIGH>;
/* Microchip KSZ8081 */
usbeth_phy: ethernet-phy@3 {
reg = <0x3>;
interrupts-extended = <&gpio5 12 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
reset-assert-us = <500>;
reset-deassert-us = <1000>;
clocks = <&clock_ksz8081>;
clock-names = "rmii-ref";
micrel,led-mode = <0>;
};
tja1102_phy0: ethernet-phy@4 {
reg = <0x4>;
interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
reset-assert-us = <20>;
reset-deassert-us = <2000>;
#address-cells = <1>;
#size-cells = <0>;
tja1102_phy1: ethernet-phy@5 {
reg = <0x5>;
interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>;
};
};
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_otg_vbus: regulator-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "otg-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi_npd>;
reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1>;
xceiver-supply = <&reg_5v0>;
status = "okay";
};
&ecspi2 {
cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
switch@0 {
compatible = "nxp,sja1105q";
reg = <0>;
spi-max-frequency = <4000000>;
spi-rx-delay-us = <1>;
spi-tx-delay-us = <1>;
spi-cpha;
reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
clocks = <&clock_sja1105>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "usb";
phy-handle = <&usbeth_phy>;
phy-mode = "rmii";
};
port@1 {
reg = <1>;
label = "t1slave";
phy-handle = <&tja1102_phy1>;
phy-mode = "rmii";
};
port@2 {
reg = <2>;
label = "t1master";
phy-handle = <&tja1102_phy0>;
phy-mode = "rmii";
};
port@3 {
reg = <3>;
label = "rj45";
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii-id";
};
port@4 {
reg = <4>;
label = "cpu";
ethernet = <&fec>;
phy-mode = "rgmii-id";
fixed-link {
speed = <100>;
full-duplex;
};
};
};
};
};
&ecspi3 {
cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
status = "okay";
can@0 {
compatible = "microchip,mcp251xfd";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can2>;
reg = <0>;
clocks = <&clock_mcp251xfd>;
spi-max-frequency = <10000000>;
interrupts-extended = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
status = "okay";
phy-mode = "rgmii";
fixed-link {
speed = <100>;
full-duplex;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* Microchip KSZ9031 */
rgmii_phy: ethernet-phy@2 {
reg = <2>;
interrupts-extended = <&gpio1 28 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <1000>;
clocks = <&clock_ksz9031>;
};
};
};
&gpio1 {
gpio-line-names =
"", "SD1_CD", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "PHY3_RESET", "", "", "PHY3_INT", "", "", "";
};
&gpio2 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "BOARD_ID3",
"BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
"", "", "", "", "", "", "", "",
"", "", "ECSPI2_SS0", "", "", "", "", "";
};
&gpio3 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "USB_OTG_OC", "USB_OTG_PWR", "",
"", "", "", "", "", "", "", "";
};
&gpio4 {
gpio-line-names =
"", "", "", "", "", "", "", "",
"", "", "", "", "CAN1_SR", "CAN2_SR", "", "",
"", "", "", "", "", "", "", "",
"ECSPI3_SS0", "CANFD_INT", "USB_ETH_RESET", "", "", "", "", "";
};
&gpio5 {
gpio-line-names =
"", "", "", "", "", "SW_RESET", "", "",
"PHY12_INT", "PHY12_RESET", "PHY12_EN", "PHY0_RESET",
"PHY0_INT", "", "", "",
"", "", "DISP1_EN", "DISP1_LR", "DISP1_TS_IRQ", "LVDS1_PD",
"", "",
"", "LVDS1_INT", "", "", "DISP0_LR", "DISP0_TS_IRQ",
"DISP0_EN", "CAM_GPIO0";
};
&gpio6 {
gpio-line-names =
"LVDS0_INT", "LVDS0_PD", "CAM_INT", "CAM_GPIO1", "CAM_PD",
"CAM_LOCK", "", "POWER_TG",
"POWER_VSEL", "", "WLAN_REG_ON", "USB_ETH_CHG", "", "",
"USB_ETH_CHG_ID0", "USB_ETH_CHG_ID1",
"USB_ETH_CHG_ID2", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
/* additional i2c devices are added automatically by the boot loader */
};
&i2c3 {
adc@49 {
compatible = "ti,ads1015";
reg = <0x49>;
#address-cells = <1>;
#size-cells = <0>;
/* VIN */
channel@4 {
reg = <4>;
ti,gain = <1>;
ti,datarate = <3>;
};
/* VBUS */
channel@5 {
reg = <5>;
ti,gain = <1>;
ti,datarate = <3>;
};
/* ICHG */
channel@6 {
reg = <6>;
ti,gain = <1>;
ti,datarate = <3>;
};
channel@7 {
reg = <7>;
ti,gain = <1>;
ti,datarate = <3>;
};
};
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "utmi";
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usbphynop1 {
status = "disabled";
};
&usbphynop2 {
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
no-1-8-v;
disable-wp;
cap-sd-highspeed;
no-mmc;
no-sdio;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
no-1-8-v;
non-removable;
mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
no-1-8-v;
non-removable;
no-sd;
no-sdio;
status = "okay";
};
&iomuxc {
pinctrl_can1: can1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
/* CAN1_SR */
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
>;
};
pinctrl_can2: can2grp {
fsl,pins = <
/* CAN2_nINT */
MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b1
/* CAN2_SR */
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13070
>;
};
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1
>;
};
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
/* CS */
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030
/* Configure clock provider for RGMII ref clock */
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
/* Configure clock consumer for RGMII ref clock */
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030
/* SJA1105Q switch reset */
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x10030
/* phy3/rgmii_phy reset */
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x10030
/* phy3/rgmii_phy int */
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x40010000
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
>;
};
pinctrl_mdio: mdiogrp {
fsl,pins = <
/* phy0/usbeth_phy reset */
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x10030
/* phy0/usbeth_phy int */
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
/* phy12/tja1102_phy0 reset */
MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x10030
/* phy12/tja1102_phy0 int */
MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x100b1
/* phy12/tja1102_phy0 enable. Set 100K pull-up */
MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1f030
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
>;
};
pinctrl_wifi_npd: wifinpd {
fsl,pins = <
/* WL_REG_ON */
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
>;
};
};

4
arch/arm/boot/dts/imx6sl-warp.dts
View File

@ -51,8 +51,8 @@
#include "imx6sl.dtsi"
/ {
model = "WaRP Board";
compatible = "warp,imx6sl-warp", "fsl,imx6sl";
model = "Revotics WaRP Board";
compatible = "revotics,imx6sl-warp", "fsl,imx6sl";
memory@80000000 {
device_type = "memory";

3
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -39,6 +39,9 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};

2
arch/arm/boot/dts/imx6sll.dtsi
View File

@ -36,6 +36,8 @@
spi1 = &ecspi2;
spi3 = &ecspi3;
spi4 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbotg2;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};

8
arch/arm/boot/dts/imx6sx-softing-vining-2000.dts
View File

@ -40,22 +40,22 @@
regulator-max-microvolt = <3300000>;
};
pwmleds {
led-controller {
compatible = "pwm-leds";
red {
led-1 {
label = "red";
max-brightness = <255>;
pwms = <&pwm6 0 50000>;
};
green {
led-2 {
label = "green";
max-brightness = <255>;
pwms = <&pwm2 0 50000>;
};
blue {
led-3 {
label = "blue";
max-brightness = <255>;
pwms = <&pwm1 0 50000>;

7
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -49,6 +49,9 @@
spi2 = &ecspi3;
spi3 = &ecspi4;
spi4 = &ecspi5;
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -463,7 +466,7 @@
clocks = <&clks IMX6SX_CLK_CAN1_IPG>,
<&clks IMX6SX_CLK_CAN1_SERIAL>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
fsl,stop-mode = <&gpr 0x10 1>;
status = "disabled";
};
@ -474,7 +477,7 @@
clocks = <&clks IMX6SX_CLK_CAN2_IPG>,
<&clks IMX6SX_CLK_CAN2_SERIAL>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
fsl,stop-mode = <&gpr 0x10 2>;
status = "disabled";
};

2
arch/arm/boot/dts/imx6ul-ccimx6ulsbcpro.dts
View File

@ -110,7 +110,7 @@
};
&gpio5 {
emmc-usd-mux {
emmc-usd-mux-hog {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-high;

1
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
View File

@ -75,6 +75,7 @@
eeprom@52 {
compatible = "catalyst,24c32", "atmel,24c32";
pagesize = <32>;
reg = <0x52>;
};
};

94
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-emmc.dts Normal file
View File

@ -0,0 +1,94 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2020 PHYTEC Messtechnik GmbH
* Author: Yunus Bas <y.bas@phytec.de>
*/
/dts-v1/;
#include "imx6ul.dtsi"
#include "imx6ul-phytec-phycore-som.dtsi"
#include "imx6ul-phytec-segin.dtsi"
#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
#include "imx6ul-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with eMMC";
compatible = "phytec,imx6ul-pbacd10-emmc", "phytec,imx6ul-pbacd10",
"phytec,imx6ul-pcl063","fsl,imx6ul";
};
&adc1 {
status = "okay";
};
&can1 {
status = "okay";
};
&ecspi3 {
status = "okay";
};
&ethphy1 {
status = "okay";
};
&ethphy2 {
status = "okay";
};
&fec1 {
status = "okay";
};
&fec2 {
status = "okay";
};
&i2c_rtc {
status = "okay";
};
&reg_can1_en {
status = "okay";
};
&reg_sound_1v8 {
status = "okay";
};
&reg_sound_3v3 {
status = "okay";
};
&sai2 {
status = "okay";
};
&sound {
status = "okay";
};
&tlv320 {
status = "okay";
};
&uart5 {
status = "okay";
};
&usbotg1 {
status = "okay";
};
&usbotg2 {
status = "okay";
};
&usdhc1 {
status = "okay";
};
&usdhc2 {
status = "okay";
};

1
arch/arm/boot/dts/imx6ul-phytec-segin-ff-rdk-nand.dts
View File

@ -9,6 +9,7 @@
#include "imx6ul-phytec-phycore-som.dtsi"
#include "imx6ul-phytec-segin.dtsi"
#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
#include "imx6ul-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";

151
arch/arm/boot/dts/imx6ul-phytec-segin-peb-av-02.dtsi Normal file
View File

@ -0,0 +1,151 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2016, 2020 PHYTEC Messtechnik
* Author: Christian Hemp <c.hemp@phytec.de>
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
*/
/ {
backlight_lcd: backlight-lcd {
compatible = "pwm-backlight";
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <5>;
power-supply = <&reg_backlight_en>;
pwms = <&pwm3 0 5000000>;
status = "disabled";
};
lcd_panel: lcd-panel {
compatible = "edt,etm0700g0edh6";
backlight = <&backlight_lcd>;
status = "disabled";
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcdif_parallel_out>;
};
};
};
reg_backlight_en: regulator-backlight-en {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight_en>;
regulator-name = "backlight-lcd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&i2c1 {
edt_ft5406: touchscreen@38 {
compatible = "edt,edt-ft5406";
reg = <0x38>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_edt_ft5406>;
interrupt-parent = <&gpio5>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
status = "disabled";
};
stmpe: touchscreen@44 {
compatible = "st,stmpe811";
reg = <0x44>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio5>;
wakeup-source;
status = "disabled";
stmpe_touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat>;
status = "disabled";
port {
lcdif_parallel_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
&pwm3 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "disabled";
};
&iomuxc {
pinctrl_edt_ft5406: edtft5406grp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
>;
};
pinctrl_backlight_en: bachlightengrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x59
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x59
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x59
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x59
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x59
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x59
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x59
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x59
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x59
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x59
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x59
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x59
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x59
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x59
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x59
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x59
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x59
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x59
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x59
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x59
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x59
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x59
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
};

43
arch/arm/boot/dts/imx6ul-phytec-segin.dtsi
View File

@ -130,31 +130,6 @@
status = "disabled";
};
stmpe: touchscreen@44 {
compatible = "st,stmpe811";
reg = <0x44>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
status = "disabled";
touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
touchscreen-inverted-x = <1>;
touchscreen-inverted-y = <1>;
};
};
i2c_rtc: rtc@68 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_int>;
@ -176,12 +151,6 @@
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "disabled";
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
@ -267,12 +236,6 @@
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
>;
};
pinctrl_rtc_int: rtcintgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
@ -289,12 +252,6 @@
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1

10
arch/arm/boot/dts/imx6ul.dtsi
View File

@ -47,6 +47,8 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbotg2;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};
@ -423,25 +425,25 @@
status = "disabled";
};
can1: flexcan@2090000 {
can1: can@2090000 {
compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
reg = <0x02090000 0x4000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
<&clks IMX6UL_CLK_CAN1_SERIAL>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
fsl,stop-mode = <&gpr 0x10 1>;
status = "disabled";
};
can2: flexcan@2094000 {
can2: can@2094000 {
compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
reg = <0x02094000 0x4000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
<&clks IMX6UL_CLK_CAN2_SERIAL>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
fsl,stop-mode = <&gpr 0x10 2>;
status = "disabled";
};

1
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-emmc.dts
View File

@ -9,6 +9,7 @@
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
#include "imx6ull-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with eMMC";

1
arch/arm/boot/dts/imx6ull-phytec-segin-ff-rdk-nand.dts
View File

@ -9,6 +9,7 @@
#include "imx6ull-phytec-phycore-som.dtsi"
#include "imx6ull-phytec-segin.dtsi"
#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
#include "imx6ull-phytec-segin-peb-av-02.dtsi"
/ {
model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";

26
arch/arm/boot/dts/imx6ull-phytec-segin-peb-av-02.dtsi Normal file
View File

@ -0,0 +1,26 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2018 PHYTEC Messtechnik GmbH
* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
*/
#include "imx6ul-phytec-segin-peb-av-02.dtsi"
&iomuxc {
/delete-node/ edtft5406grp;
/delete-node/ stmpegrp;
};
&iomuxc_snvs {
pinctrl_edt_ft5406: edtft5406grp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
};

7
arch/arm/boot/dts/imx6ull-phytec-segin.dtsi
View File

@ -14,7 +14,6 @@
&iomuxc {
/delete-node/ flexcan1engrp;
/delete-node/ rtcintgrp;
/delete-node/ stmpegrp;
};
&iomuxc_snvs {
@ -29,10 +28,4 @@
MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
>;
};
};

69
arch/arm/boot/dts/imx7-mba7.dtsi
View File

@ -14,6 +14,12 @@
#include <dt-bindings/net/ti-dp83867.h>
/ {
aliases {
mmc0 = &usdhc3;
mmc1 = &usdhc1;
/delete-property/ mmc2;
};
beeper {
compatible = "gpio-beeper";
gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
@ -164,6 +170,20 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
sound {
compatible = "fsl,imx-audio-tlv320aic32x4";
model = "imx-audio-tlv320aic32x4";
ssi-controller = <&sai1>;
audio-codec = <&tlv320aic32x4>;
audio-routing =
"IN3_L", "Mic Jack",
"Mic Jack", "Mic Bias",
"IN1_L", "Line In Jack",
"IN1_R", "Line In Jack",
"Line Out Jack", "LOL",
"Line Out Jack", "LOR";
};
};
&adc1 {
@ -179,7 +199,6 @@
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
num-chipselects = <3>;
cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
<&gpio4 2 GPIO_ACTIVE_LOW>;
status = "okay";
@ -188,7 +207,6 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
num-chipselects = <1>;
status = "okay";
};
@ -214,10 +232,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
/* LED1: Link/Activity, LED2: Error */
ti,led-function = <0x0db0>;
/* Active low, LED1 and LED2 driven by phy */
ti,led-ctrl = <0x1001>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
@ -362,13 +377,25 @@
>;
};
pinctrl_pca9555: pca95550grp {
fsl,pins = <
MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78
>;
};
pinctrl_sai1: sai1grp {
fsl,pins = <
MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11
MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c
MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c
MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c
MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c
MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14
MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e
@ -472,6 +499,12 @@
MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59
>;
};
pinctrl_wdog1: wdog1grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30
>;
};
};
&pwm1 {
@ -480,6 +513,16 @@
status = "okay";
};
&sai1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
<&clks IMX7D_SAI1_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
assigned-clock-rates = <0>, <36864000>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
@ -518,6 +561,9 @@
assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
rs485-rx-during-tx;
status = "okay";
};
@ -532,7 +578,8 @@
srp-disable;
hnp-disable;
adp-disable;
dr_mode = "host";
over-current-active-low;
dr_mode = "otg";
status = "okay";
};
@ -548,3 +595,9 @@
no-1-8-v;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog1>;
fsl,ext-reset-output;
};

25
arch/arm/boot/dts/imx7d-flex-concentrator-mfg.dts Normal file
View File

@ -0,0 +1,25 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Kamstrup OMNIA Flex Concentrator in
* manufacturing/debugging mode.
*
* Copyright (C) 2020 Kamstrup A/S
* Author: Bruno Thomsen <bruno.thomsen@gmail.com>
*/
/dts-v1/;
#include "imx7d-flex-concentrator.dts"
/ {
model = "Kamstrup OMNIA Flex Concentrator - Manufacturing";
compatible = "kam,imx7d-flex-concentrator-mfg", "fsl,imx7d";
chosen {
stdout-path = &uart4;
};
};
&uart4 {
status = "okay";
};

314
arch/arm/boot/dts/imx7d-flex-concentrator.dts Normal file
View File

@ -0,0 +1,314 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for Kamstrup OMNIA Flex Concentrator.
*
* Copyright (C) 2020 Kamstrup A/S
* Author: Bruno Thomsen <bruno.thomsen@gmail.com>
*/
/dts-v1/;
#include "imx7d-tqma7.dtsi"
/* One I2C device on TQMa7 SoM is not mounted */
/delete-node/ &ds1339;
/ {
model = "Kamstrup OMNIA Flex Concentrator";
compatible = "kam,imx7d-flex-concentrator", "fsl,imx7d";
memory@80000000 {
device_type = "memory";
/* 1024 MB - TQMa7D board configuration */
reg = <0x80000000 0x40000000>;
};
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed";
regulator-name = "VBUS_USBOTG2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_vref_1v8: regulator-vref-1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC1V8_REF";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
vin-supply = <&sw2_reg>;
};
/*
* Human Machine Interface consists of 4 dual red/green LEDs.
* hmi-a:green is controlled directly by the switch-mode power supply.
* hmi-a:red is not used.
*/
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
led-0 {
label = "hmi-b:red:heartbeat-degraded";
gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>;
};
led-1 {
label = "hmi-b:green:heartbeat-running";
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-2 {
label = "hmi-c:red:mesh-error";
gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
};
led-3 {
label = "hmi-c:green:mesh-activity";
gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
};
led-4 {
label = "hmi-d:red:omnia-error";
gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;
};
led-5 {
label = "hmi-d:green:omnia-activity";
gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
};
};
/*
* Errata e10574 board restart workaround.
*/
gpio-restart {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_restart>;
compatible = "gpio-restart";
gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
priority = <200>;
};
};
/*
* Analog signals
* ADC1_IN0: SMPS - 5V output monitor (voltage divider: 1/0.2806)
*/
&adc1 {
vref-supply = <&reg_vref_1v8>;
status = "okay";
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
num-chipselects = <1>;
cs-gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
status = "okay";
pcf2127: rtc@0 {
compatible = "nxp,pcf2127";
reg = <0>;
spi-max-frequency = <2000000>;
};
};
&ecspi4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4>;
num-chipselects = <1>;
cs-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
status = "okay";
/*
* ST chip maximum SPI clock frequency is 33 MHz.
*
* TCG specification - Section 6.4.1 Clocking:
* TPM shall support a SPI clock frequency range of 10-24 MHz.
*/
st33htph: tpm-tis@0 {
compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
reg = <0>;
spi-max-frequency = <24000000>;
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
phy-handle = <&ethphy>;
status = "okay";
/*
* MDIO bus reset is used to generate PHY device reset before
* Ethernet PHY type ID auto-detection. Otherwise this communication
* fails as device does not answer when recommended reset circuit
* is used.
*/
mdio {
#address-cells = <1>;
#size-cells = <0>;
reset-delay-us = <100000>;
reset-post-delay-us = <500000>;
reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
/* Microchip/Micrel KSZ8081RNB */
ethphy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
reg = <1>;
};
};
};
/*
* Detection signals for internal USB modules.
* Used for robust USB plug and play handling such as USB downstream port
* power-cycle and USB hub reset in case of misbehaving or crashed modules.
*
* SMPS - AC input monitor based on zero crossing.
* Used for last gasp notification.
*/
&gpio3 {
gpio-line-names = "", "", "", "", "", "", "", "",
"", "", "", "", "smps-ac-monitor", "", "usb-hub-reset", "",
"", "", "", "", "", "", "", "",
"", "module-b-detection", "", "module-a-detection", "", "", "", "";
};
/*
* Tamper IRQ trigger timestamp reading.
* Used for sealed cover opened/closed notification.
*/
&gpio5 {
gpio-line-names = "", "", "", "", "", "", "", "",
"", "", "", "", "rtc-tamper-irq", "", "", "",
"", "", "", "", "", "", "", "",
"", "", "", "", "", "", "", "";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_misc>;
pinctrl_ecspi2: ecspi2grp {
fsl,pins = <
MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c /* X2-15 */
MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74 /* X2-18 */
MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74 /* X2-13 */
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x74 /* X2-20 */
/* RTC - Tamper IRQ */
MX7D_PAD_SD2_CLK__GPIO5_IO12 0x3c /* X1-92 */
>;
};
pinctrl_ecspi4: ecspi4grp {
fsl,pins = <
MX7D_PAD_LCD_CLK__ECSPI4_MISO 0x7c /* X2-72 */
MX7D_PAD_LCD_ENABLE__ECSPI4_MOSI 0x74 /* X2-68 */
MX7D_PAD_LCD_HSYNC__ECSPI4_SCLK 0x74 /* X2-76 */
MX7D_PAD_LCD_VSYNC__GPIO3_IO3 0x74 /* X2-78 */
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x03 /* X2-48 */
MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x03 /* X2-46 */
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71 /* X2-53 */
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71 /* X2-55 */
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71 /* X2-61 */
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79 /* X2-56 */
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79 /* X2-58 */
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79 /* X2-64 */
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 /* X2-52 */
/* PHY reset: SRE_FAST, DSE_X1 */
MX7D_PAD_ENET1_COL__GPIO7_IO15 0x00 /* X1-96 */
/* Clock from PHY to MAC: 100kPU */
MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x70 /* X3-4 */
/* PHY interrupt: 100kPU, HYS */
MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x78 /* X1-80 */
>;
};
pinctrl_leds: ledsgrp {
fsl,pins = <
MX7D_PAD_LCD_DATA01__GPIO3_IO6 0x14 /* X2-82 */
MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* X1-82 */
MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* X1-84 */
MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* X1-86 */
MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* X1-88 */
MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x14 /* X1-90 */
>;
};
pinctrl_misc: miscgrp {
fsl,pins = <
/* Module A detection (low = present) */
MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x7c /* X2-105 */
/* Module B detection (low = present) */
MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x7c /* X2-103 */
/* SMPS - AC input monitor (high = failure) */
MX7D_PAD_LCD_DATA07__GPIO3_IO12 0x7c /* X2-88 */
/* USB - Hub reset */
MX7D_PAD_LCD_DATA09__GPIO3_IO14 0x74 /* X2-92 */
>;
};
pinctrl_restart: restartgrp {
fsl,pins = <
MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x74 /* X1-94 */
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e /* X3-14 */
MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76 /* X3-16 */
>;
};
};
&iomuxc_lpsr {
pinctrl_usbotg2: usbotg2grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC 0x5c /* X3-11 */
MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x59 /* X3-9 */
>;
};
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
};
&usbotg2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg2>;
vbus-supply = <&reg_usb_otg2_vbus>;
srp-disable;
hnp-disable;
adp-disable;
over-current-active-low;
dr_mode = "host";
status = "okay";
};
/*
* External watchdog feature provided by pcf2127.
*/
&wdog1 {
status = "disabled";
};

7
arch/arm/boot/dts/imx7d-mba7.dts
View File

@ -14,7 +14,7 @@
/ {
model = "TQ Systems TQMa7D board on MBa7 carrier board";
compatible = "tq,imx7d-mba7", "fsl,imx7d";
compatible = "tq,imx7d-mba7", "tq,imx7d-tqma7", "fsl,imx7d";
};
&fec2 {
@ -39,10 +39,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
/* LED1: Link/Activity, LED2: error */
ti,led-function = <0x0db0>;
/* active low, LED1/2 driven by phy */
ti,led-ctrl = <0x1001>;
ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};

6
arch/arm/boot/dts/imx7d.dtsi
View File

@ -7,6 +7,12 @@
#include <dt-bindings/reset/imx7-reset.h>
/ {
aliases {
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
};
cpus {
cpu0: cpu@0 {
clock-frequency = <996000000>;

2
arch/arm/boot/dts/imx7s-mba7.dts
View File

@ -14,5 +14,5 @@
/ {
model = "TQ Systems TQMa7S board on MBa7 carrier board";
compatible = "tq,imx7s-mba7", "fsl,imx7s";
compatible = "tq,imx7s-mba7", "tq,imx7s-tqma7", "fsl,imx7s";
};

4
arch/arm/boot/dts/imx7s-warp.dts
View File

@ -10,8 +10,8 @@
#include "imx7s.dtsi"
/ {
model = "Warp i.MX7 Board";
compatible = "warp,imx7s-warp", "fsl,imx7s";
model = "Element14 Warp i.MX7 Board";
compatible = "element14,imx7s-warp", "fsl,imx7s";
memory@80000000 {
device_type = "memory";

6
arch/arm/boot/dts/imx7s.dtsi
View File

@ -47,6 +47,8 @@
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
usb0 = &usbotg1;
usb1 = &usbh;
};
cpus {
@ -971,7 +973,7 @@
clocks = <&clks IMX7D_CLK_DUMMY>,
<&clks IMX7D_CAN1_ROOT_CLK>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
fsl,stop-mode = <&gpr 0x10 1>;
status = "disabled";
};
@ -982,7 +984,7 @@
clocks = <&clks IMX7D_CLK_DUMMY>,
<&clks IMX7D_CAN2_ROOT_CLK>;
clock-names = "ipg", "per";
fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
fsl,stop-mode = <&gpr 0x10 2>;
status = "disabled";
};

75
arch/arm/boot/dts/ls1021a.dtsi
View File

@ -173,7 +173,7 @@
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1021a-dcfg", "syscon";
reg = <0x0 0x1ee0000 0x0 0x10000>;
reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian;
};
@ -288,46 +288,43 @@
compatible = "fsl,qoriq-tmu";
reg = <0x0 0x1f00000 0x0 0x10000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
fsl,tmu-calibration = <0x00000000 0x0000000f
0x00000001 0x00000017
0x00000002 0x0000001e
0x00000003 0x00000026
0x00000004 0x0000002e
0x00000005 0x00000035
0x00000006 0x0000003d
0x00000007 0x00000044
0x00000008 0x0000004c
0x00000009 0x00000053
0x0000000a 0x0000005b
0x0000000b 0x00000064
fsl,tmu-range = <0xb0000 0x9002c 0x6004e 0x30066>;
fsl,tmu-calibration = <0x00000000 0x00000020
0x00000001 0x00000024
0x00000002 0x0000002a
0x00000003 0x00000032
0x00000004 0x00000038
0x00000005 0x0000003e
0x00000006 0x00000043
0x00000007 0x0000004a
0x00000008 0x00000050
0x00000009 0x00000059
0x0000000a 0x0000005f
0x0000000b 0x00000066
0x00010000 0x00000011
0x00010001 0x0000001c
0x00010002 0x00000024
0x00010003 0x0000002b
0x00010004 0x00000034
0x00010005 0x00000039
0x00010006 0x00000042
0x00010007 0x0000004c
0x00010008 0x00000051
0x00010009 0x0000005a
0x0001000a 0x00000063
0x00010000 0x00000023
0x00010001 0x0000002b
0x00010002 0x00000033
0x00010003 0x0000003a
0x00010004 0x00000042
0x00010005 0x0000004a
0x00010006 0x00000054
0x00010007 0x0000005c
0x00010008 0x00000065
0x00010009 0x0000006f
0x00020000 0x00000013
0x00020001 0x00000019
0x00020002 0x00000024
0x00020003 0x0000002c
0x00020004 0x00000035
0x00020005 0x0000003d
0x00020006 0x00000046
0x00020007 0x00000050
0x00020008 0x00000059
0x00020000 0x00000029
0x00020001 0x00000033
0x00020002 0x0000003d
0x00020003 0x00000048
0x00020004 0x00000054
0x00020005 0x00000060
0x00020006 0x0000006c
0x00030000 0x00000002
0x00030001 0x0000000d
0x00030002 0x00000019
0x00030003 0x00000024>;
0x00030000 0x00000025
0x00030001 0x00000033
0x00030002 0x00000043
0x00030003 0x00000055>;
#thermal-sensor-cells = <1>;
};
@ -1013,7 +1010,7 @@
compatible = "fsl,ls1021a-ftm-alarm";
reg = <0x0 0x29d0000 0x0 0x10000>;
reg-names = "ftm";
fsl,rcpm-wakeup = <&rcpm 0x20000 0x0>;
fsl,rcpm-wakeup = <&rcpm 0x0 0x20000000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
big-endian;
};

6
arch/arm/boot/dts/vfxxx.dtsi
View File

@ -95,7 +95,7 @@
status = "disabled";
};
can0: flexcan@40020000 {
can0: can@40020000 {
compatible = "fsl,vf610-flexcan";
reg = <0x40020000 0x4000>;
interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
@ -293,7 +293,7 @@
status = "disabled";
};
wdoga5: wdog@4003e000 {
wdoga5: watchdog@4003e000 {
compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
reg = <0x4003e000 0x1000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
@ -681,7 +681,7 @@
status = "disabled";
};
can1: flexcan@400d4000 {
can1: can@400d4000 {
compatible = "fsl,vf610-flexcan";
reg = <0x400d4000 0x4000>;
interrupts = <59 IRQ_TYPE_LEVEL_HIGH>;