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sky2: force receive checksum when using RSS on some hardware (v2)
Found when reviewing the vendor driver. Apparently some chip versions require receive checksumming to be enabled in order for RSS to work. Also, if fix_features has to change some settings; put in message in log in similar manner to netdev_fix_features. Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2996,7 +2996,8 @@ static int __devinit sky2_init(struct sky2_hw *hw)
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hw->flags = SKY2_HW_GIGABIT
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| SKY2_HW_NEWER_PHY
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| SKY2_HW_NEW_LE
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| SKY2_HW_ADV_POWER_CTL;
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| SKY2_HW_ADV_POWER_CTL
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| SKY2_HW_RSS_CHKSUM;
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/* New transmit checksum */
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if (hw->chip_rev != CHIP_REV_YU_EX_B0)
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@ -3024,7 +3025,7 @@ static int __devinit sky2_init(struct sky2_hw *hw)
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/* The workaround for status conflicts VLAN tag detection. */
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if (hw->chip_rev == CHIP_REV_YU_FE2_A0)
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hw->flags |= SKY2_HW_VLAN_BROKEN;
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hw->flags |= SKY2_HW_VLAN_BROKEN | SKY2_HW_RSS_CHKSUM;
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break;
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case CHIP_ID_YUKON_SUPR:
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@ -3033,6 +3034,9 @@ static int __devinit sky2_init(struct sky2_hw *hw)
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| SKY2_HW_NEW_LE
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| SKY2_HW_AUTO_TX_SUM
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| SKY2_HW_ADV_POWER_CTL;
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if (hw->chip_rev == CHIP_REV_YU_SU_A0)
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hw->flags |= SKY2_HW_RSS_CHKSUM;
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break;
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case CHIP_ID_YUKON_UL_2:
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@ -4176,8 +4180,18 @@ static u32 sky2_fix_features(struct net_device *dev, u32 features)
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/* In order to do Jumbo packets on these chips, need to turn off the
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* transmit store/forward. Therefore checksum offload won't work.
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*/
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if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U)
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if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) {
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netdev_info(dev, "checksum offload not possible with jumbo frames\n");
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features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM);
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}
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/* Some hardware requires receive checksum for RSS to work. */
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if ( (features & NETIF_F_RXHASH) &&
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!(features & NETIF_F_RXCSUM) &&
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(sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) {
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netdev_info(dev, "receive hashing forces receive checksum\n");
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features |= NETIF_F_RXCSUM;
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}
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return features;
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}
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@ -2281,6 +2281,7 @@ struct sky2_hw {
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#define SKY2_HW_ADV_POWER_CTL 0x00000080 /* additional PHY power regs */
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#define SKY2_HW_RSS_BROKEN 0x00000100
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#define SKY2_HW_VLAN_BROKEN 0x00000200
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#define SKY2_HW_RSS_CHKSUM 0x00000400 /* RSS requires chksum */
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u8 chip_id;
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u8 chip_rev;
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