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spi: Restore delays for non-GPIO chip select
SPI controller with integrated chip select handling still need to adhere
to SPI device's CS setup, hold and inactive delays. For controller
without set_cs_timing spi core shall handle the delays to avoid
duplicated delay handling in each controller driver.
Fixes a regression for the out of tree SPI controller and SPI HID
transport on Apple M1/M1 Pro/Max notebooks.
Fixes: 4d8ff6b099
("spi: Add multi-cs memories support in SPI core")
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://msgid.link/r/20240311-spi-cs-delays-regression-v1-1-0075020a90b2@jannau.net
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
2ae0ab0143
commit
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@ -1063,10 +1063,14 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
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if (spi->mode & SPI_CS_HIGH)
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enable = !enable;
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if (spi_is_csgpiod(spi)) {
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if (!spi->controller->set_cs_timing && !activate)
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spi_delay_exec(&spi->cs_hold, NULL);
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/*
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* Handle chip select delays for GPIO based CS or controllers without
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* programmable chip select timing.
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*/
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if ((spi_is_csgpiod(spi) || !spi->controller->set_cs_timing) && !activate)
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spi_delay_exec(&spi->cs_hold, NULL);
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if (spi_is_csgpiod(spi)) {
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if (!(spi->mode & SPI_NO_CS)) {
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/*
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* Historically ACPI has no means of the GPIO polarity and
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@ -1099,16 +1103,16 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
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if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
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spi->controller->set_cs)
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spi->controller->set_cs(spi, !enable);
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if (!spi->controller->set_cs_timing) {
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if (activate)
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spi_delay_exec(&spi->cs_setup, NULL);
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else
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spi_delay_exec(&spi->cs_inactive, NULL);
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}
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} else if (spi->controller->set_cs) {
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spi->controller->set_cs(spi, !enable);
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}
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if (spi_is_csgpiod(spi) || !spi->controller->set_cs_timing) {
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if (activate)
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spi_delay_exec(&spi->cs_setup, NULL);
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else
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spi_delay_exec(&spi->cs_inactive, NULL);
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}
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}
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#ifdef CONFIG_HAS_DMA
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