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arm64: insn: Add return statements after BUG_ON()
Following a recent series of enhancements to the insn code the ARMv8 allnoconfig build has been generating a large number of warnings in the form of: arch/arm64/kernel/insn.c:689:8: warning: 'insn' may be used uninitialized in this function [-Wmaybe-uninitialized] This is because BUG() and related macros can be compiled out so we get execution paths which normally result in a panic compiling out to noops instead. I wasn't able to immediately identify a sensible return value to use in these cases so just return AARCH64_BREAK_FAULT - this is all "should never happen" code so hopefully it never has a practical impact. Signed-off-by: Mark Brown <broonie@kernel.org> [catalin.marinas@arm.com: AARCH64_BREAK_FAULT definition contributed by Daniel Borkmann] [catalin.marinas@arm.com: replace return 0 with AARCH64_BREAK_FAULT] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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@ -48,9 +48,11 @@
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/*
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* #imm16 values used for BRK instruction generation
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* Allowed values for kgbd are 0x400 - 0x7ff
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* 0x100: for triggering a fault on purpose (reserved)
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* 0x400: for dynamic BRK instruction
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* 0x401: for compile time BRK instruction
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*/
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#define FAULT_BRK_IMM 0x100
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#define KGDB_DYN_DGB_BRK_IMM 0x400
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#define KDBG_COMPILED_DBG_BRK_IMM 0x401
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@ -60,6 +62,12 @@
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*/
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#define AARCH64_BREAK_MON 0xd4200000
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/*
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* BRK instruction for provoking a fault on purpose
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* Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
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*/
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#define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
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/*
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* Extract byte from BRK instruction
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*/
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@ -22,7 +22,9 @@
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#include <linux/smp.h>
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#include <linux/stop_machine.h>
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#include <linux/uaccess.h>
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#include <asm/cacheflush.h>
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#include <asm/debug-monitors.h>
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#include <asm/insn.h>
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#define AARCH64_INSN_SF_BIT BIT(31)
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@ -388,6 +390,7 @@ u32 __kprobes aarch64_insn_gen_branch_imm(unsigned long pc, unsigned long addr,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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return aarch64_insn_encode_immediate(AARCH64_INSN_IMM_26, insn,
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@ -413,6 +416,7 @@ u32 aarch64_insn_gen_comp_branch_imm(unsigned long pc, unsigned long addr,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -423,6 +427,7 @@ u32 aarch64_insn_gen_comp_branch_imm(unsigned long pc, unsigned long addr,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn, reg);
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@ -475,6 +480,7 @@ u32 aarch64_insn_gen_branch_reg(enum aarch64_insn_register reg,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RN, insn, reg);
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@ -497,6 +503,7 @@ u32 aarch64_insn_gen_load_store_reg(enum aarch64_insn_register reg,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn = aarch64_insn_encode_ldst_size(size, insn);
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@ -535,6 +542,7 @@ u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -553,6 +561,7 @@ u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RT, insn,
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@ -590,6 +599,7 @@ u32 aarch64_insn_gen_add_sub_imm(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -600,6 +610,7 @@ u32 aarch64_insn_gen_add_sub_imm(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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BUG_ON(imm & ~(SZ_4K - 1));
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@ -632,6 +643,7 @@ u32 aarch64_insn_gen_bitfield(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -644,6 +656,7 @@ u32 aarch64_insn_gen_bitfield(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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BUG_ON(immr & ~mask);
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@ -677,6 +690,7 @@ u32 aarch64_insn_gen_movewide(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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BUG_ON(imm & ~(SZ_64K - 1));
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@ -692,6 +706,7 @@ u32 aarch64_insn_gen_movewide(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn |= (shift >> 4) << 21;
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@ -725,6 +740,7 @@ u32 aarch64_insn_gen_add_sub_shifted_reg(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -737,6 +753,7 @@ u32 aarch64_insn_gen_add_sub_shifted_reg(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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@ -769,6 +786,7 @@ u32 aarch64_insn_gen_data1(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -779,6 +797,7 @@ u32 aarch64_insn_gen_data1(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
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@ -815,6 +834,7 @@ u32 aarch64_insn_gen_data2(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -825,6 +845,7 @@ u32 aarch64_insn_gen_data2(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
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@ -852,6 +873,7 @@ u32 aarch64_insn_gen_data3(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -862,6 +884,7 @@ u32 aarch64_insn_gen_data3(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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insn = aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RD, insn, dst);
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@ -911,6 +934,7 @@ u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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switch (variant) {
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@ -923,6 +947,7 @@ u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,
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break;
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default:
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BUG_ON(1);
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return AARCH64_BREAK_FAULT;
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}
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